Datasheet > CD54ACT138_08

CD54ACT138_08

更新时间： 2024-11-24 05:08:59

品牌	Logo	应用领域
德州仪器 - TI		解码器解复用器
页数	文件大小	规格书
16页	652K
描述
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

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数据手册

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CD54ACT138_08 数据手册

CD54ACT138, CD74ACT138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCHS329A – JANUARY 2003 – REVISED FEBRUARY 2003

CD54ACT138 . . . F PACKAGE

CD74ACT138 . . . E OR M PACKAGE

(TOP VIEW)

Inputs Are TTL-Voltage Compatible

Speed of Bipolar F, AS, and S, With

Significantly Reduced Power Consumption

15 Y0

Designed Specifically for High-Speed

Memory Decoders and Data-Transmission

Systems

G2A

G2B

Incorporate Three Enable Inputs to Simplify

Cascading and/or Data Reception

Balanced Propagation Delays

±24-mA Output Drive Current

– Fanout to 15 F Devices

GND

SCR-Latchup-Resistant CMOS Process and

Circuit Design

Exceeds 2-kV ESD Protection Per

MIL-STD-883, Method 3015

description/ordering information

The ’ACT138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing

applications that require very short propagation-delay times. In high-performance memory systems, these

decoders can be used to minimize the effects of system decoding. When employed with high-speed memories

utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are

less than the typical access time of the memory. This means that the effective system delay introduced by the

decoders is negligible.

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two

active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.

A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one

inverter. An enable input can be used as a data input for demultiplexing applications (see Application

Information).

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

†

PACKAGE

PDIP – E

SOIC – M

CDIP – F

Tube

CD74ACT138E

CD74ACT138M

CD74ACT138E

–55°C to 125°C

ACT138M

Tape and reel CD74ACT138M96

Tube CD54ACT138F3A

CD54ACT138F3A

†

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...16

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与CD54ACT138_08相关器件

型号	品牌	获取价格	描述	数据表
CD54ACT1383A	TI	获取价格	3-to-8-Line Decoders/Demultiplexers
CD54ACT1383A	INTERSIL	获取价格	3-to-8-Line Decoder/Demultiplexer Inverting
CD54ACT138E	ETC	获取价格	Logic IC
CD54ACT138EN	ETC	获取价格	Logic IC
CD54ACT138F	ETC	获取价格	Logic IC
CD54ACT138F3A	TI	获取价格	3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
CD54ACT138H	GE	获取价格	Decoder/Driver, ACT Series, Inverted Output, CMOS,
CD54ACT138HX	GE	获取价格	Decoder/Driver, ACT Series, Inverted Output, CMOS,
CD54ACT138M	ETC	获取价格	Logic IC
CD54ACT139	INTERSIL	获取价格	Dual 2-to-4-Line Decoder/Demultiplexer

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