CD4512BCJ

更新时间： 2024-01-29 19:08:36

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
6页	145K
描述
IC 4000/14000/40000 SERIES, 8 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDIP16, CERAMIC, DIP-16, Multiplexer/Demultiplexer

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技术参数
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CD4512BCJ 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	风险等级：	5.92
JESD-30 代码：	R-XDFP-F16	JESD-609代码：	e0
逻辑集成电路类型：	MULTIPLEXER	功能数量：	1
输入次数：	8	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-55 °C
封装主体材料：	CERAMIC	封装代码：	DFP
封装等效代码：	FL16,.3	封装形状：	RECTANGULAR
封装形式：	FLATPACK	认证状态：	Not Qualified
子类别：	Multiplexer/Demultiplexers	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	FLAT
端子节距：	1.27 mm	端子位置：	DUAL
Base Number Matches：	1

CD4512BCJ 数据手册

February 1988

CD4512BM/CD4512BC 8-Channel Buffered Data Selector

General Description

Features

Wide supply voltage range

3.0V to 15V

0.45 V (typ.)

The CD4512BM/CD4512BC buffered 8-channel data selec-

tor is a complementary MOS (CMOS) circuit constructed

with N- and P-channel enhancement mode transistors. This

data selector is primarily used as a digital signal multiplexer

selecting 1 of 8 inputs and routing the signal to a TRI-

High noise immunity

TRI-STATE output

Low quiescent power dissipation

0.25 mW/package

5.0V

(typ.)

STATE output. A high level at the Inhibit input forces a low

Plug-in replacement for Motorola MC14512

level at the output. A high level at the Output Enable (OE)

input forces the output into the TRI-STATE condition. Low

levels at both the Inhibit and (OE) inputs allow normal oper-

ation.

Connection Diagram and Truth Table

Dual-In-Line Package

Order Number CD4512B

TL/F/5993–1

Top View

Address Inputs

Control Inputs

Output

Inhibit

Hi-Z

Don’t care

Hi-Z

TRI-STATE condition

Data at input n

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

1995 National Semiconductor Corporation

TL/F/5993

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6

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