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CD4093BCCW PDF预览

CD4093BCCW

更新时间: 2024-11-29 19:53:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 逻辑集成电路
页数 文件大小 规格书
8页 87K
描述
NAND Gate, 4000/14000/40000 Series, 4-Func, 2-Input, CMOS, WAFER

CD4093BCCW 技术参数

生命周期:Obsolete零件包装代码:WAFER
包装说明:DIE,Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.62
系列:4000/14000/40000JESD-30 代码:X-XUUC-N14
逻辑集成电路类型:NAND GATE功能数量:4
输入次数:2端子数量:14
封装主体材料:UNSPECIFIED封装代码:DIE
封装形状:UNSPECIFIED封装形式:UNCASED CHIP
传播延迟(tpd):450 ns认证状态:Not Qualified
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

CD4093BCCW 数据手册

 浏览型号CD4093BCCW的Datasheet PDF文件第2页浏览型号CD4093BCCW的Datasheet PDF文件第3页浏览型号CD4093BCCW的Datasheet PDF文件第4页浏览型号CD4093BCCW的Datasheet PDF文件第5页浏览型号CD4093BCCW的Datasheet PDF文件第6页浏览型号CD4093BCCW的Datasheet PDF文件第7页 
October 1987  
Revised January 1999  
CD4093BC  
Quad 2-Input NAND Schmitt Trigger  
Equal source and sink currents  
No limit on input rise and fall time  
General Description  
The CD4093B consists of four Schmitt-trigger circuits.  
Each circuit functions as a 2-input NAND gate with Schmitt-  
trigger action on both inputs. The gate switches at different  
points for positive and negative-going signals. The differ-  
ence between the positive (VT+) and the negative voltage  
(VT) is defined as hysteresis voltage (VH).  
Standard B-series output drive  
Hysteresis voltage (any input) TA = 25°C  
Typical  
V
V
V
DD = 5.0V  
DD = 10V  
DD = 15V  
V
V
V
V
H = 1.5V  
H = 2.2V  
H = 2.7V  
H = 0.1 VDD  
All outputs have equal source and sink currents and con-  
form to standard B-series output drive (see Static Electrical  
Characteristics).  
Guaranteed  
Applications  
Features  
Wide supply voltage range: 3.0V to 15V  
Wave and pulse shapers  
High-noise-environment systems  
Monostable multivibrators  
Astable multivibrators  
NAND logic  
Schmitt-trigger on each input  
with no external components  
Noise immunity greater than 50%  
Ordering Code:  
Order Number Package Number  
Package Description  
CD4093BCM  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow Body  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
CD4093BCN  
N14A  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Assignments for SOIC and DIP  
Top View  
© 1999 Fairchild Semiconductor Corporation  
DS005982.prf  
www.fairchildsemi.com  

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