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CD4025 PDF预览

CD4025

更新时间: 2024-11-03 22:54:19
品牌 Logo 应用领域
英特矽尔 - INTERSIL 复用器
页数 文件大小 规格书
8页 62K
描述
CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

CD4025 数据手册

 浏览型号CD4025的Datasheet PDF文件第2页浏览型号CD4025的Datasheet PDF文件第3页浏览型号CD4025的Datasheet PDF文件第4页浏览型号CD4025的Datasheet PDF文件第5页浏览型号CD4025的Datasheet PDF文件第6页浏览型号CD4025的Datasheet PDF文件第7页 
CD40257BMS  
CMOS Quad 2 Line to 1 Line  
Data Selector/Multiplexer  
December 1992  
Features  
Pinout  
CD40257BMS  
TOP VIEW  
• High Voltage Type (20V Rating)  
• 3-State Outputs  
• 100% Tested for Quiescent Current at 20V  
• 5V, 10V and 15V Parametric Ratings  
INPUT SELECT  
1
2
3
4
5
6
7
8
16 VDD  
15 OUTPUT DISABLE  
14 A4  
A1  
B1  
• Maximum Input Current of 1µA at 18V Over Full Pack-  
age Temperature Range; 100nA at 18V and +25oC  
D1  
13 B4  
• Noise Margin (Over Full Package/Temperature Range)  
- 1V at VDD = 5V  
A2  
12 D4  
B2  
11 A3  
- 2V at VDD = 10V  
10 B3  
D2  
- 2.5V at VDD = 15V  
9
D3  
VSS  
• Standardized Symmetrical Output Characteristics  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
Applications  
Functional Diagram  
• Digital Multiplexing  
• Shift Right/Shift Left Registers  
• True/Complement Selection  
OUTPUT  
DISABLE  
15  
2
3
4
A1  
B1  
A2  
B2  
A3  
D1  
Description  
5
CD40257BMS is a data selector/multiplexer featuring three  
state outputs which can interface directly with and drive data  
lines of bus oriented systems.  
7
9
D2  
D3  
D4  
6
11  
10  
14  
13  
The CD40257BMS is supplied in these 16-lead outline  
packages:  
B3  
A4  
B4  
12  
Braze Seal DIP  
Frit Seal DIP  
Ceramic Flatpack  
H4T  
H1E  
H3X  
1
VDD = 16  
VSS = 8  
INPUT  
SELECT  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3364  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-1442  

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