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CD4008 PDF预览

CD4008

更新时间: 2024-01-09 08:57:51
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
8页 70K
描述
CMOS 4-Bit Full Adder With Parallel Carry Out

CD4008 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL16,.3Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-XDFP-F16
JESD-609代码:e0逻辑集成电路类型:ADDER/SUBTRACTOR
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC
封装代码:DFP封装等效代码:FL16,.3
封装形状:RECTANGULAR封装形式:FLATPACK
电源:5/15 V认证状态:Not Qualified
子类别:Arithmetic Circuits表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
Base Number Matches:1

CD4008 数据手册

 浏览型号CD4008的Datasheet PDF文件第2页浏览型号CD4008的Datasheet PDF文件第3页浏览型号CD4008的Datasheet PDF文件第4页浏览型号CD4008的Datasheet PDF文件第5页浏览型号CD4008的Datasheet PDF文件第6页浏览型号CD4008的Datasheet PDF文件第7页 
CD4008BMS  
CMOS 4-Bit Full Adder With  
Parallel Carry Out  
November 1994  
Features  
Pinout  
CD4008BMS  
TOP VIEW  
• High-Voltage Type (20V Rating)  
• 4 Sum Outputs Plus Parallel Look-ahead Carry-Output  
• High-Speed Operation - Sum In-To-Sum Out, 160ns  
Typ; Carry In-To-Carry Out, 5ns Typ. At VDD = 10V,  
CL=50pF  
A4  
B3  
1
2
3
4
5
6
7
8
16 VDD  
15 B4  
14 CO  
13 S4  
12 S3  
11 S2  
10 S1  
A3  
• Standardized Symmetrical Output Characteristics  
• 100% Tested For Quiescent Current At 20V  
B2  
A2  
• Maximum Input Current of 1µa at 18V Over Full Pack-  
age-Temperature Range;  
B1  
A1  
- 100nA at 18V and 25oC  
9
C1  
VSS  
• Noise Margin (Over Full Package Temperature Range):  
- 1V at VDD = 5V  
- 2V at VDD = 10V  
Logic Diagram  
- 2.5V at VDD = 15V  
• 5V, 10V and 15V Parametric Ratings  
14  
HIGH SPEED  
PAR CARRY  
CO  
• Meets All Requirements of JEDEC Tentative Standard  
No. 13B, “Standard Specifications for Description of  
‘B’ Series CMOS Devices”  
(CARRY-OUT)  
15  
*
B4  
13  
1
SUM  
S4  
S3  
*
A4  
Applications  
C4  
2
*
*
B3  
A3  
12  
• Binary Addition/Arithmetic Units  
3
SUM  
C3  
4
5
Description  
*
*
B2  
A2  
11  
SUM  
S2  
S1  
CD4008BMS types consist of four full adder stages with fast  
look ahead carry provision from stage to stage. Circuitry is  
included to provide a fast “parallel-carry-out” but to permit  
high-speed operation in arithmetic sections using several  
CD4008BMS’s.  
VDD  
C2  
6
7
9
*
B1  
10  
SUM  
A1 *  
*
C1  
CD4008BMS inputs include the four sets of bits to be added,  
A1 to A4 and B1 to B4, in addition to the “Carry In” bit from a  
previous section. CD4008BMS outputs include the four sum  
bits, S1 to S4. In addition to the high speed “parallel-carry-  
out” which may be utilized at a succeeding CD4008BMS  
section.  
(CARRY-IN)  
VSS  
*ALL INPUTS ARE PROTECTED  
BY CMOS PROTECTION  
NETWORK  
VDD = 16  
VSS = 8  
TRUTH TABLE  
The CD4008BMS is supplied in these 16-lead outline pack-  
ages:  
A
B
C
C
O
SUM  
i
i
i
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
0
1
Braze Seal DIP  
Frit Seal DIP  
H4T  
H1F  
0
0
1
0
1
1
1
Ceramic Flatpack H6W  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 3292  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
7-675  

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