Datasheet > CAT34C02

CAT34C02

更新时间： 2024-01-30 09:25:52

品牌	Logo	应用领域
CATALYST		双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
17页	306K
描述
2-Kb I2C EEPROM for DDR2 DIMM Serial Presence Detect

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CAT34C02 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Transferred	包装说明：	TSSOP, TSSOP8,.25
Reach Compliance Code：	unknown	风险等级：	5.71
数据保留时间-最小值：	100	耐久性：	1000000 Write/Erase Cycles
I2C控制字节：	1010DDDR	JESD-30 代码：	R-PDSO-G8
内存密度：	2048 bit	内存集成电路类型：	EEPROM
内存宽度：	8	端子数量：	8
字数：	256 words	字数代码：	256
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	256X8	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行：	SERIAL	电源：	2/5 V
认证状态：	Not Qualified	串行总线类型：	I2C
最大待机电流：	0.000002 A	子类别：	EEPROMs
最大压摆率：	0.001 mA	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	写保护：	HARDWARE/SOFTWARE
Base Number Matches：	1

CAT34C02 数据手册

CAT34C02

READ OPERATIONS

Immediate Address Read

Instandbymode,theCAT34C02internaladdresscounter

pointstothedatabyteimmediatelyfollowingthelastbyte

accessed by a previous operation. If that ‘previous’ byte

was the last byte in memory, then the address counter

will point to the 1^stmemory byte, etc.

When, following a START, the CAT34C02 is presented

with a Slave address containing a ‘1’ in the R/W bit

position (Figure 9), it will acknowledge (ACK) in the 9^th

clock cycle, and will then transmit data being pointed

at by the internal address counter. The Master can stop

further transmission by issuing a NoACK, followed by a

STOP condition.

Selective Read

The Read operation can also be started at an address

differentfromtheonestoredintheinternaladdresscoun-

ter.The address counter can be initialized by performing

a ‘dummy’ Write operation (Figure 10). Here the START

is followed by the Slave address (with the R/W bit set

to ‘0’) and the desired byte address. Instead of follow-

ing up with data, the Master then issues a 2^ndSTART,

followed by the ‘Immediate Address Read’ sequence,

as described earlier.

Sequential Read

If the Master acknowledges the 1^stdata byte transmitted

by the CAT34C02, then the device will continue trans-

mitting as long as each data byte is acknowledged by

the Master (Figure 11). If the end of memory is reached

during sequential Read, then the address counter will

‘wrap-around’tothebeginningofmemory,etc.Sequential

Read works with either ‘Immediate Address Read’ or

‘Selective Read’, the only difference being the starting

byte address.

Characteristics subject to change without notice

Doc. No. 1095, Rev. C

1...5 6 789 10 11...17

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与CAT34C02相关器件

型号	品牌	描述	获取价格	数据表
CAT34C02_11	ONSEMI	2 kb I2C EEPROM for DDR2 DIMM Serial Presence	获取价格
CAT34C02_18	ONSEMI	EEPROM Serial 2-Kb I2C forDDR2 DIMM SPD	获取价格
CAT34C02HU3	ONSEMI	2 kb I2C EEPROM for DDR2 DIMM Serial Presence	获取价格
CAT34C02HU3IG4	ONSEMI	2 kb I2C EEPROM for DDR2 DIMM Serial Presence Detect	获取价格
CAT34C02HU3I-G4	ONSEMI	2 kb I2C EEPROM for DDR2 DIMM Serial Presence	获取价格
CAT34C02HU3IG5	ONSEMI	2 kb I2C EEPROM for DDR2 DIMM Serial Presence Detect	获取价格

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