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CAT25C17VE-G PDF预览

CAT25C17VE-G

更新时间： 2024-02-22 17:54:06
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CATALYST 可编程只读存储器
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中文翻译

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CAT25C17VE-G 数据手册

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Advanced  
CAT25C03/05/09/17/33  
2K/4K/8K/16K/32K SPI Serial CMOS E2PROM  
FEATURES  
■ 1,000,000 Program/Erase Cycles  
■ 100 Year Data Retention  
■ 10 MHz SPI Compatible  
■ 1.8 to 6.0 Volt Operation  
■ Hardware and Software Protection  
■ Zero Standby Current  
■ Self-Timed Write Cycle  
■ 8-Pin DIP/SOIC, 16-Pin SOIC and 14-Pin TSSOP  
■ Page Write Buffer  
■ Low Power CMOS Technology  
■ SPI Modes (0,0 &1,1)  
■ Write Protection  
– Protect First Page, Last Page, Any 1/4 Array  
or Lower 1/2 Array  
■ Commercial, Industrial and Automotive  
Temperature Ranges  
DESCRIPTION  
input (SCK), data in (SI) and data out (SO) are required  
to access the device. The HOLD pin may be used to  
suspend any serial communication without resetting the  
serial sequence. The CAT25C03/05/09/17/33 is de-  
signed with software and hardware write protection  
features. The device is available in 8-pin DIP, 8-pin  
SOIC, 16-pin SOIC, 8-pin TSSOP and 14-pin TSSOP  
packages.  
TheCAT25C03/05/09/17/33isa2K/4K/8K/16K/32K-Bit  
SPI Serial CMOS E2PROM internally organized as  
256x8/512x8/1024x8/2048x8/4096x8 bits. Catalyst’s  
advanced CMOS Technology substantially reduces de-  
vice power requirements. The CAT25C03/05 features a  
16-byte page write buffer. The 25C09/17/33 features a  
32-byte page write buffer.The device operates via the  
SPI bus serial interface and is enabled though a Chip  
Select (CS). In addition to the Chip Select, the clock  
PIN CONFIGURATION  
SOIC Package (S)  
SOIC Package (S16)  
DIP Package (P)  
TSSOP Package (U)  
TSSOP Package (U14)  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V
V
16  
CS  
SO  
WP  
1
2
3
4
5
6
7
8
VCC  
HOLD  
NC  
CC CS  
CC  
14  
13  
12  
11  
10  
9
8
1
2
3
4
5
6
7
VCC  
HOLD  
NC  
NC  
NC  
CS  
SO  
CS  
SO  
NC  
NC  
NC  
WP  
1
2
3
4
8
7
6
5
CS  
SO  
V
CC  
HOLD  
SCK  
SI  
SO  
HOLD  
15  
14  
13  
12  
11  
10  
9
HOLD  
SCL  
SI  
WP  
NC  
NC  
NC  
NC  
WP  
VSS  
SCK  
WP  
V
SS  
V
V
NC  
SI  
SS  
SS  
NC  
SCK  
SI  
V
SS  
NC  
BLOCK DIAGRAM  
SCK  
SI  
SENSE AMPS  
SHIFT REGISTERS  
COLUMN  
DECODERS  
WORD ADDRESS  
BUFFERS  
PIN FUNCTIONS  
Pin Name  
SO  
Function  
SO  
SI  
Serial Data Output  
Serial Clock  
I/O  
CONTROL  
SCK  
WP  
E2PROM  
ARRAY  
CS  
SPI  
CONTROL  
LOGIC  
XDEC  
Write Protect  
WP  
HOLD  
SCK  
VCC  
+1.8V to +6.0V Power Supply  
Ground  
VSS  
BLOCK  
PROTECT  
LOGIC  
CS  
Chip Select  
DATA IN  
STORAGE  
SI  
Serial Data Input  
Suspends Serial Input  
No Connect  
HOLD  
NC  
HIGH VOLTAGE/  
TIMING CONTROL  
STATUS  
REGISTER  
25C128 F02  
© 1998 by Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
Doc. No. 25068-00 2/98  
1
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