5秒后页面跳转
CAT24C082PI-45 PDF预览

CAT24C082PI-45

更新时间: 2024-01-26 03:26:25
品牌 Logo 应用领域
CATALYST 光电二极管外围集成电路
页数 文件大小 规格书
12页 71K
描述
Microprocessor Circuit, CMOS, PDIP8, PLASTIC, DIP-8

CAT24C082PI-45 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:8Reach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.92
JESD-30 代码:R-PDIP-T8JESD-609代码:e0
长度:9.27 mm端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压:6 V最小供电电压:2.7 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR CIRCUIT
Base Number Matches:1

CAT24C082PI-45 数据手册

 浏览型号CAT24C082PI-45的Datasheet PDF文件第6页浏览型号CAT24C082PI-45的Datasheet PDF文件第7页浏览型号CAT24C082PI-45的Datasheet PDF文件第8页浏览型号CAT24C082PI-45的Datasheet PDF文件第10页浏览型号CAT24C082PI-45的Datasheet PDF文件第11页浏览型号CAT24C082PI-45的Datasheet PDF文件第12页 
CAT24CXX1/XX2  
Acknowledge Polling  
protected and becomes read only. The CAT24CXXX  
will accept both slave and byte addresses, but the  
memory location accessed is protected from  
programming by the device’s failure to send an  
acknowledge after the first byte of data is received.  
Disabling of the inputs can be used to take advantage of  
the typical write cycle time. Once the stop condition is  
issuedtoindicatetheendofthehost’swriteopration, the  
CAT24CXXXinitiatestheinternalwritecycle.ACKpolling  
can be initiated immediately. This involves issueing the  
start condition followed by the slave address for a write  
operation. If the CAT24CXXX is still busy with the write  
operation, no ACK will be returned. If a write operation  
hascompleted, anACKwillbereturnedandthehostcan  
then proceed with the next read or write operation.  
Read Operations  
The READ operation for the CAT24CXXX is initiated in  
the same manner as the write operation with one  
exception, that R/W bit is set to one. Three different  
READ operations are possible: Immediate/Current  
Address READ, Selective/Random READ and  
Sequential READ.  
WRITE PROTECTION  
The Write Protection feature allows the user to protect  
against inadvertent memory array programming. If the  
WP pin is tied to VCC, the entire memory array is  
Figure 9. Immediate Address Read Timing  
S
T
A
R
T
S
T
O
P
BUS ACTIVITY:  
MASTER  
SLAVE  
ADDRESS  
SDA LINE  
S
P
A
C
K
N
O
DATA  
A
C
K
SCL  
SDA  
8
9
8TH BIT  
DATA OUT  
NO ACK  
STOP  
24C1601 Fig. 8  
Doc No. 3000, Rev. A  
9

与CAT24C082PI-45相关器件

型号 品牌 描述 获取价格 数据表
CAT24C082PI-45TE13 CATALYST Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog

获取价格

CAT24C083 CATALYST Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog

获取价格

CAT24C083J CATALYST EEPROM

获取价格

CAT24C083J25TE13 CATALYST Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog

获取价格

CAT24C083J-25TE13 CATALYST Power Supply Management Circuit, Adjustable, 1 Channel, CMOS, PDSO8, SOIC-8

获取价格

CAT24C083J-28TE13 CATALYST Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog

获取价格