Datasheet > CAT1163J-45TE13

CAT1163J-45TE13

更新时间： 2024-01-07 01:27:57

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		光电二极管外围集成电路
页数	文件大小	规格书
13页	751K
描述
SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

CAT1163J-45TE13 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	SOIC
包装说明：	SOP,	针数：	8
Reach Compliance Code：	unknown	风险等级：	5.66
Is Samacsys：	N	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0	长度：	4.9 mm
湿度敏感等级：	NOT SPECIFIED	端子数量：	8
最高工作温度：	70 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	240	认证状态：	COMMERCIAL
座面最大高度：	1.75 mm	最大供电电压：	6 V
最小供电电压：	2.7 V	标称供电电压：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	MICROPROCESSOR CIRCUIT
Base Number Matches：	1

CAT1163J-45TE13 数据手册

CAT1163

STOP Condition

FUNCTIONAL DESCRIPTION

The CAT1163 supports the I²C Bus data transmission

protocol.ThisInter-IntegratedCircuitBusprotocoldefines

any device that sends data to the bus to be a transmitter

and any device receiving data to be a receiver. The

transfer is controlled by the Master device which

generates the serial clock and all START and STOP

conditions for bus access. Both the Master device and

Slavedevicecanoperateaseithertransmitterorreceiver,

but the Master device controls which mode is activated.

A LOW to HIGH transition of SDA when SCL is HIGH

determinestheSTOPcondition.Alloperationsmustend

with a STOP condition.

DEVICE ADDRESSING

The Master begins a transmission by sending a START

condition.TheMastersendstheaddressoftheparticular

slave device it is requesting. The four most significant

bits of the 8-bit slave address are fixed as 1010.

I²C Bus Protocol

Thenextthreebits(Figure6)definememoryaddressing.

For the CAT1163 the three bits define higher order bits.

The features of the I²C bus protocol are defined as

follows:

The last bit of the slave address specifies whether a

ReadorWriteoperationistobeperformed.Whenthisbit

is set to 1, a Read operation is selected, and when set

to 0, a Write operation is selected.

(1) Data transfer may be initiated only when the bus is

not busy.

(2) During a data transfer, the data line must remain

stable whenever the clock line is high. Any changes in

thedatalinewhiletheclocklineishighwillbeinterpreted

as a START or STOP condition.

After the Master sends a START condition and the slave

address byte, the CAT1163 monitors the bus and

responds with an acknowledge (on the SDA line) when

its address matches the transmitted slave address. The

CAT1163 then performs a Read or Write operation

depending on the R/W bit.

START Condition

The START Condition precedes all commands to the

device, and is defined as a HIGH to LOW transition of

SDA when SCL is HIGH. The CAT1163 monitors the

SDA and SCL lines and will not respond until this

condition is met.

Figure 5. Acknowledge Timing

SCL FROM

MASTER

DATA OUTPUT

FROM TRANSMITTER

DATA OUTPUT

FROM RECEIVER

START

ACKNOWLEDGE

Figure 6. Slave Address Bits

CAT1163

24C163

a10 a9

a8 R/W

‘X’ corresponds to Don’t Care Bits (can be zero or a one).

** a8, a9 and a10 correspond to the address of the memory array address word.

Doc No. 3003, Rev. C

1...5 6 789 10 11...13

中文翻译

下载PDF

与CAT1163J-45TE13相关器件

型号	品牌	获取价格	描述	数据表
CAT1163JI-25	CATALYST	获取价格	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163JI-25TE13	CATALYST	获取价格	Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog T
CAT1163JI-25TE13	ONSEMI	获取价格	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163JI-28	CATALYST	获取价格	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163JI-28TE13	CATALYST	获取价格	Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog T
CAT1163JI-28TE13	ONSEMI	获取价格	SPECIALTY MICROPROCESSOR CIRCUIT, PDSO8, SOIC-8
CAT1163JI-30TE13	CATALYST	获取价格	Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog T
CAT1163JI-42TE13	CATALYST	获取价格	Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog T
CAT1163JI-45TE13	CATALYST	获取价格	Supervisory Circuit with I2C Serial CMOS EEPROM, Precision Reset Controller and Watchdog T
CAT1163L-25	CATALYST	获取价格	SPECIALTY MICROPROCESSOR CIRCUIT, PDIP8, PLASTIC, DIP-8

与CAT1163J-45TE13相关文章

晶闸管阳极与阴极之间加电压时控制极的电流流动分析
2024-06-05

10
探究MOS管沟道夹断后载流子传输机制及其电路设计影响
2024-06-05

9
光敏电阻的工作原理、作用及检测方法
2024-06-05

8
ENC28J60以太网控制器全面解析：特性、应用、引脚说明
2024-06-05

6

产品中心

服务支持

精选活动

关于我们

帮助中心

CAT1163J-45TE13

CAT1163J-45TE13 技术参数

CAT1163J-45TE13 数据手册

与CAT1163J-45TE13相关器件

与CAT1163J-45TE13相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CAT1163J-45TE13

CAT1163J-45TE13 技术参数

CAT1163J-45TE13 数据手册

与CAT1163J-45TE13相关器件

与CAT1163J-45TE13相关文章

您还可以找

您在本页遇到什么问题？