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CAT1025YI-45-GT3 PDF预览

CAT1025YI-45-GT3

更新时间： 2024-11-14 11:53:47
品牌 Logo 应用领域
安森美 - ONSEMI 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
20页 204K
描述
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset

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CAT1025YI-45-GT3 技术参数

是否无铅： 不含铅生命周期：Active
零件包装代码：TSSOP包装说明：TSSOP,
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
Factory Lead Time：26 weeks风险等级：5.06
其他特性：RESET THRESHOLD VOLTAGE IS 4.625V; MANUAL RESET INPUT可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUITJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：4.4 mm
湿度敏感等级：1信道数量：1
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3 mmBase Number Matches：1

CAT1025YI-45-GT3 数据手册

 浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第2页浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第3页浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第4页浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第5页浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第6页浏览型号CAT1025YI-45-GT3的Datasheet PDF文件第7页 
CAT1024, CAT1025  
Supervisory Circuits with I2C Serial 2k-bit  
CMOS EEPROM and Manual Reset  
FEATURES  
DESCRIPTION  
ꢀ Precision Power Supply Voltage Monitor  
— 5 V, 3.3 V and 3 V systems  
— Five threshold voltage options  
ꢀ Active High or Low Reset  
— Valid reset guaranteed at VCC = 1 V  
ꢀ 400 kHz I2C Bus  
The CAT1024 and CAT1025 are complete memory  
and supervisory solutions for microcontroller-based  
systems. A 2k-bit serial EEPROM memory and a  
system power supervisor with brown-out protection  
are integrated together in low power CMOS techno–  
logy. Memory interface is via a 400 kHz I2C bus.  
The CAT1025 provides a precision VCC sense circuit  
and two open drain outputs: one (RESET) drives high  
ꢀ 2.7 V to 5.5 V Operation  
¯¯¯¯¯¯  
and the other (RESET) drives low whenever VCC falls  
ꢀ Low power CMOS technology  
ꢀ 16-Byte Page Write Buffer  
ꢀ Built-in inadvertent write protection  
— WP pin (CAT1025)  
below the reset threshold voltage. The CAT1025 also  
has a Write Protect input (WP). Write operations are  
disabled if WP is connected to a logic high.  
The CAT1024 also provides a precision VCC sense  
circuit, but has only a RESET output and does not  
have a Write Protect input.  
ꢀ 1,000,000 Program/Erase cycles  
ꢀ Manual Reset Input  
¯¯¯¯¯¯  
ꢀ 100 year data retention  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
voltages support 5 V, 3.3 V and 3 V systems. If power  
supply voltages are out of tolerance reset signals  
become active, preventing the system microcontroller,  
ASIC or peripherals from operating. Reset signals  
become inactive typically 200 ms after the supply  
voltage exceeds the reset threshold level. With both  
active high and low reset signals, interface to  
microcontrollers and other ICs is simple. In addition,  
ꢀ Industrial and extended temperature ranges  
ꢀ Green packages available with NiPdAu Lead  
finished  
¯¯¯¯¯¯  
¯¯¯  
the RESET pin or a separate input, MR, can be used  
as an input for push-button manual reset capability.  
For Ordering Information details, see page 19.  
The CAT1024/25 memory features a 16-byte page. In  
addition, hardware data protection is provided by a  
VCC sense circuit that prevents writes to memory  
whenever VCC falls below the reset threshold or until  
VCC reaches the reset threshold during power up.  
Available packages include an 8-pin PDIP and a  
surface mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN  
and 8-pin MSOP packages. The TDFN package thick-  
ness is 0.8 mm maximum. TDFN footprint is 3 x 3 mm.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
1
Doc. No. MD-3008 Rev. R  
1234567...20

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CAT1025YI-45-GT3 替代型号

型号 品牌 替代类型 描述 数据表
CAT1025YI-30-GT3 ONSEMI

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 Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset

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