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CAT1025YI-28-GT2

更新时间： 2024-11-14 03:04:55
品牌 Logo 应用领域
CATALYST 监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
20页 266K
描述
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset

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CAT1025YI-28-GT2 数据手册

 浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第2页浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第3页浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第4页浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第5页浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第6页浏览型号CAT1025YI-28-GT2的Datasheet PDF文件第7页 
CAT1024, CAT1025  
Supervisory Circuits with I2C Serial 2k-bit  
CMOS EEPROM and Manual Reset  
FEATURES  
DESCRIPTION  
ꢀ Precision Power Supply Voltage Monitor  
The CAT1024 and CAT1025 are complete memory  
— 5V, 3.3V and 3V systems  
— Five threshold voltage options  
ꢀ Active High or Low Reset  
— Valid reset guaranteed at VCC = 1V  
ꢀ 400kHz I2C Bus  
and supervisory solutions for microcontroller-based  
systems. A 2k-bit serial EEPROM memory and a  
system power supervisor with brown-out protection  
are integrated together in low power CMOS techno–  
logy. Memory interface is via a 400kHz I2C bus.  
The CAT1025 provides a precision VCC sense circuit  
and two open drain outputs: one (RESET) drives high  
ꢀ 2.7V to 5.5V Operation  
ꢀ Low power CMOS technology  
ꢀ 16-Byte Page Write Buffer  
ꢀ Built-in inadvertent write protection  
— WP pin (CAT1025)  
¯¯¯¯¯¯  
and the other (RESET) drives low whenever VCC falls  
below the reset threshold voltage. The CAT1025 also  
has a Write Protect input (WP). Write operations are  
disabled if WP is connected to a logic high.  
The CAT1024 also provides a precision VCC sense  
ꢀ 1,000,000 Program/Erase cycles  
ꢀ Manual Reset Input  
¯¯¯¯¯¯  
circuit, but has only a RESET output and does not  
have a Write Protect input.  
ꢀ 100 year data retention  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
voltages support 5V, 3.3V and 3V systems. If power  
supply voltages are out of tolerance reset signals  
become active, preventing the system microcontroller,  
ASIC or peripherals from operating. Reset signals  
become inactive typically 200 ms after the supply  
voltage exceeds the reset threshold level. With both  
active high and low reset signals, interface to  
microcontrollers and other ICs is simple. In addition,  
ꢀ Industrial and extended temperature ranges  
ꢀ Green packages available with NiPdAu Lead  
finished  
¯¯¯¯¯¯  
¯¯¯  
the RESET pin or a separate input, MR, can be used  
as an input for push-button manual reset capability.  
For Ordering Information details, see page 19.  
The CAT1024/25 memory features a 16-byte page. In  
addition, hardware data protection is provided by a  
VCC sense circuit that prevents writes to memory  
whenever VCC falls below the reset threshold or until  
VCC reaches the reset threshold during power up.  
Available packages include an 8-pin DIP and a  
surface mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN  
and 8-pin MSOP packages. The TDFN package thick-  
ness is 0.8mm maximum. TDFN footprint is 3x3mm.  
© 2007 Catalyst Semiconductor, Inc.  
Characteristics subject to change without notice  
1
Doc. No. 3008 Rev. N  
1234567...20

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