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CAT1025LI-42TE13 PDF预览

CAT1025LI-42TE13

更新时间: 2024-11-13 22:18:27
品牌 Logo 应用领域
CATALYST 电源电路电源管理电路光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数 文件大小 规格书
20页 140K
描述
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset

CAT1025LI-42TE13 技术参数

是否Rohs认证: 符合生命周期:Transferred
零件包装代码:DIP包装说明:DIP,
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.06可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDIP-T8
JESD-609代码:e3长度:9.59 mm
信道数量:1功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:4.57 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:7.62 mm
Base Number Matches:1

CAT1025LI-42TE13 数据手册

 浏览型号CAT1025LI-42TE13的Datasheet PDF文件第2页浏览型号CAT1025LI-42TE13的Datasheet PDF文件第3页浏览型号CAT1025LI-42TE13的Datasheet PDF文件第4页浏览型号CAT1025LI-42TE13的Datasheet PDF文件第5页浏览型号CAT1025LI-42TE13的Datasheet PDF文件第6页浏览型号CAT1025LI-42TE13的Datasheet PDF文件第7页 
Preliminary Information  
E
CAT1024, CAT1025  
Supervisory Circuits with I2C Serial 2k-bit CMOS EEPROM and Manual Reset  
TM  
FEATURES  
16-Byte page write buffer  
Precision power supply voltage monitor  
Built-in inadvertent write protection  
— 5V, 3.3V and 3V systems  
— WP pin (CAT1025)  
— Five threshold voltage options  
1,000,000 Program/Erase cycles  
Active high or low reset  
Manual reset input  
— Valid reset guaranteed at VCC = 1V  
100 year data retention  
400kHz I2C bus  
8-pin DIP, SOIC, TSSOP, MSOP &  
3.0V to 5.5V operation  
TDFN (3x3mm foot print) packages  
Low power CMOS technology  
Industrial and extended temperature ranges  
DESCRIPTION  
voltages support 5V, 3.3V and 3V systems. If power supply  
voltages are out of tolerance reset signals become active,  
preventing the system microcontroller, ASIC or peripherals  
from operating. Reset signals become inactive typically 200  
ms after the supply voltage exceeds the reset threshold  
level. With both active high and low reset signals, interface  
to microcontrollers and other ICs is simple. In addition, the  
RESET pin or a separate input, MR, can be used as an input  
for push-button manual reset capability.  
The CAT1024 and CAT1025 are complete memory and  
supervisorysolutionsformicrocontroller-basedsystems.  
A 2k-bit serial EEPROM memory and a system power  
supervisor with brown-out protection are integrated  
together in low power CMOS technology. Memory  
interface is via a 400kHz I2C bus.  
The CAT1025 provides a precision VCC sense circuit  
and two open drain outputs: one (RESET) drives high  
and the other (RESET) drives low whenever VCC falls  
below the reset threshold voltage. The CAT1025 also  
has a Write Protect input (WP). Write operations are  
disabled if WP is connected to a logic high.  
The CAT1024/25 memory features a 16-byte page. In  
addition, hardware data protection is provided by a VCC  
sense circuit that prevents writes to memory whenever VCC  
falls below the reset threshold or until VCC reaches the reset  
threshold during power up.  
The CAT1024 also provides a precision VCC sense  
circuit, but has only a RESET output and does not have  
a Write Protect input.  
Available packages include an 8-pin DIP, 8-pin SOIC, 8-pin  
TSSOP, 8-pin TDFN and 8-pin MSOP. The TDFN package  
thickness is 0.8mm maximum. TDFN footprint is 3x3mm.  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
PIN CONFIGURATION  
DIP Package (P, L)  
(Bottom View)  
TDFN Package: 3mm x 3mm  
0.8mm maximum height - (RD4, ZD4)  
SOIC Package (J, W)  
TSSOP Package (U, Y)  
MSOP Package (R, Z)  
V
MR  
8
7
6
5
1
2
3
4
1
8
7
6
5
MR  
V
CC  
NC  
CC  
RESET  
NC  
RESET 2  
NC  
CAT1024  
CAT1024  
SCL  
SDA  
NC  
3
4
SCL  
SDA  
V
SS  
V
SS  
8
7
6
5
1
V
MR  
1
MR  
V
8
CC  
CC  
2
3
4
RESET 2  
WP  
WP  
SCL  
SDA  
7
6
5
RESET  
RESET  
CAT1025  
CAT1025  
3
4
SCL  
SDA  
RESET  
V
V
SS  
SS  
© 2004 by Catalyst Semiconductor, Inc.  
Doc No. 3008, Rev. M  
Characteristics subject to change without notice  

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