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CAT1023WI-28-G PDF预览

CAT1023WI-28-G

更新时间： 2024-11-15 20:52:35
品牌 Logo 应用领域
安森美 - ONSEMI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
21页 202K
描述
CPU Supervisor with 2 k EEPROM Memory, SOIC 8, 150 mils, 100-TUBE

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CAT1023WI-28-G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：,
针数：8Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.61模拟集成电路 - 其他类型：POWER SUPPLY MANAGEMENT CIRCUIT
JESD-609代码：e4湿度敏感等级：1
峰值回流温度（摄氏度）：NOT SPECIFIED端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
处于峰值回流温度下的最长时间：NOT SPECIFIEDBase Number Matches：1

CAT1023WI-28-G 数据手册

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CAT1021, CAT1022, CAT1023  
Supervisory Circuits with I2C Serial 2k-bit CMOS  
EEPROM, Manual Reset and Watchdog Timer  
FEATURES  
DESCRIPTION  
ꢀ Precision Power Supply Voltage Monitor  
— 5 V, 3.3 V and 3 V systems  
— Five threshold voltage options  
ꢀ Watchdog Timer  
The CAT1021, CAT1022 and CAT1023 are complete  
memory and supervisory solutions for microcontroller-  
based systems. A 2k-bit serial EEPROM memory and a  
system power supervisor with brown-out protection are  
integrated together in low power CMOS technology.  
Memory interface is via a 400 kHz I2C bus.  
ꢀ Active High or Low Reset  
— Valid reset guaranteed at VCC = 1 V  
ꢀ 400 kHz I2C Bus  
The CAT1021 and CAT1023 provide a precision VCC  
sense circuit and two open drain outputs: one (RESET)  
¯¯¯¯¯¯  
drives high and the other (RESET) drives low whenever  
ꢀ 2.7 V to 5.5 V Operation  
VCC falls below the reset threshold voltage. The  
ꢀ Low power CMOS technology  
ꢀ 16-Byte Page Write Buffer  
ꢀ Built-in inadvertent write protection  
— WP pin (CAT1021)  
¯¯¯¯¯¯  
CAT1022 has only a RESET output and does not have  
a Write Protect input. The CAT1021 also has a Write  
Protect input (WP). Write operations are disabled if WP  
is connected to a logic high.  
All supervisors have a 1.6 second watchdog timer circuit  
that resets a system to a known state if software or a  
hardware glitch halts or “hangs” the system. For the  
CAT1021 and CAT1022, the watchdog timer monitors  
the SDA signal. The CAT1023 has a separate watchdog  
timer interrupt input pin, WDI.  
ꢀ 1,000,000 Program/Erase cycles  
ꢀ Manual Reset Input  
ꢀ 100 year data retention  
ꢀ Industrial and extended temperature ranges  
ꢀ 8-pin DIP, SOIC, TSSOP, MSOP or TDFN  
The power supply monitor and reset circuit protect  
memory and system controllers during power up/down  
and against brownout conditions. Five reset threshold  
voltages support 5 V, 3.3 V and 3 V systems. If power  
supply voltages are out of tolerance reset signals  
become active, preventing the system microcontroller,  
ASIC or peripherals from operating. Reset signals  
become inactive typically 200 ms after the supply voltage  
exceeds the reset threshold level. With both active high  
and low reset signals, interface to microcontrollers and  
(3 x 3 mm foot-print) packages  
— TDFN max height is 0.8 mm  
¯¯¯¯¯¯  
other ICs is simple. In addition, the RESET pin or a  
¯¯¯  
separate input, MR, can be used as an input for push-  
button manual reset capability.  
For Ordering Information details, see page 19.  
The on-chip, 2k-bit EEPROM memory features a 16-byte  
page. In addition, hardware data protection is provided  
by a VCC sense circuit that prevents writes to memory  
whenever VCC falls below the reset threshold or until VCC  
reaches the reset threshold during power up.  
Available packages include an 8-pin DIP and surface  
mount 8-pin SO, 8-pin TSSOP, 8-pin TDFN and 8-pin  
MSOP packages. The TDFN package thickness is  
0.8mm maximum. TDFN footprint options are 3 x 3mm.  
© 2009 SCILLC. All rights reserved.  
Characteristics subject to change without notice  
1
Doc. No. MD-3009 Rev. P  
1234567...21

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