CA3160, CA3160A
Schematic Diagram
7
V+
BIAS CURRENT
CURRENT SOURCE
“CURRENT SOURCE
FOR Q AND Q
LOAD” FOR Q
6
7
11
Q
3
Q
1
Q
2
D
D
D
D
1
2
3
4
Q
4
Z
8.3V
Q
5
1
R
1
40kΩ
R
2
5kΩ
INPUT STAGE
SECOND
STAGE
D
5
D
7
D
6
NON-INV.
INPUT
OUTPUT
STAGE
Q
8
3
+
Q
Q
7
6
OUTPUT
2kΩ
2
-
6
30
pF
INV. INPUT
R
3
1kΩ
R
1kΩ
4
Q
12
Q
Q
9
11
Q
10
R
R
5
6
1kΩ
1kΩ
SUPPLEMENTARY
COMP IF DESIRED
5
1
8
4
OFFSET NULL
STROBING
NOTE: Diodes D Through D Provide Gate Oxide Protection For MOSFET Input Stage.
5
7
Application Information
resistance presented to the amplifier is very high (e.g., when
the amplifier output is used to drive MOS digital circuits in
comparator applications).
Circuit Description
Refer to the Block Diagram of the CA3160 series CMOS
Operational Amplifiers. The input terminals may be operated
down to 0.5V below the negative supply rail, and the output
can be swung very close to either supply rail in many
applications. Consequently, the CA3160 series circuits are
ideal for single supply operation. Three class A amplifier
stages, having the individual gain capability and current
consumption shown in the Block Diagram provide the total
gain of the CA3160. A biasing circuit provides two potentials
for common use in the first and second stages. Terminals 8
and 1 can be used to supplement the internal phase
Input Stage - The circuit of the CA3160 is shown in the
Schematic Diagram. It consists of a differential-input stage
using PMOS field-effect transistors (Q , Q ) working into a
6
7
mirror-pair of bipolar transistors (Q , Q ) functioning as load
9
10
resistors together with resistors R through R . The mirror-
3
6
pair transistors also function as a differential-to-single-ended
converter to provide base drive to the second-stage bipolar
transistor (Q ). Offset nulling, when desired, can be effected
11
by connecting a 100,000Ω potentiometer across Terminals 1
compensation network if additional phase compensation or
frequency roll-off is desired. Terminals 8 and 4 can also be
used to strobe the output stage into a low quiescent current
state. When Terminal 8 is tied to the negative supply rail
(Terminal 4) by mechanical or electrical means, the output
potential at Terminal 6 essentially rises to the positive supply-
rail potential at Terminal 7. This condition of essentially zero
current drain in the output stage under the strobed “OFF”
condition can only be achieved when the ohmic load
and 5 and the potentiometer slider arm to Terminal 4.
Cascode-connected PMOS transistors Q , Q , are the
2
4
constant-current source for the input stage. The biasing circuit
for the constant-current source is subsequently described.
The small diodes D through D provide gate-oxide protection
5
7
against high-voltage transients, including static electricity
during handling for Q and Q .
6
7
Second-Stage - Most of the voltage gain in the CA3160 is
provided by the second amplifier stage, consisting of bipolar
4