Datasheet > C3225X7R2E104K

C3225X7R2E104K

更新时间： 2024-11-23 12:53:35

品牌	Logo	应用领域
东电化 - TDK		/
页数	文件大小	规格书
1页	132K
描述
All specifications are subject to change without notice

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C3225X7R2E104K 数据手册

C3225X7R2E104K200AM

--- Multilayer Ceramic Chip Capacitor (MLCC) ---

DC Bias Characteristic

Application & Main Feature

-10

-20

-30

-40

-50

-60

-70

-80

Commercial Grade ( Open Mode )

Series

C3225 [EIA CC1210]

100

150

200

250

300

DC Bias/V

Dimensions

3.20mm +/-0.4mm

2.50mm +/-0.3mm

2.00mm +/-0.2mm

0.20mm Min.

|Z|, ESR vs. Freq. Characteristics

Temperature Characteristic

100000

10000

1000

100

-10

-20

-30

-40

-50

-60

-70

-80

-90

Temperature Characteristic

X7R (-55 to 125 degC +/-15%)

0.1

Rated Voltage

2E (250Vdc)

0.01

0.001

0.01

0.1

100

1000

-80

-60

-40

-20

100 120 140

Capacitance

Temperature/degC

Frequency/MHz

100nF

|Z|

ESR

Temp.Chara.

TCBias(1/2Rated)

Capacitance Tolerance

Cap. vs. Freq. Characteristic

Ripple Temperature Rise Characteristic

K (+/-10%)

1000

100

Dissipation Factor

3% Max.

Insulation Resitance

5Gohm Min.

AEC-Q200

Not Applicable

0.2

0.4

0.6

0.8

1.2

1.4

1.6

0.001

0.01

0.1

100

1000

Current/Arms

Frequency/MHz

100kHz

500kHz

1MHz

December 22, 2012

All specifications are subject to change without notice.

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