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C2012JB0J685K125AB PDF预览

C2012JB0J685K125AB

更新时间: 2024-11-28 01:25:15
品牌 Logo 应用领域
东电化 - TDK /
页数 文件大小 规格书
1页 138K
描述
Multilayer Ceramic Chip Capacitors

C2012JB0J685K125AB 数据手册

  
C2012JB0J685K125AB  
TDK Item Description : C2012JB0J685KT****  
DC Bias Characteristic  
0
-10  
-20  
-30  
-40  
-50  
-60  
Application & Main Feature  
Commercial Grade ( General (Up to 50V) )  
Series  
C2012 [EIA CC0805]  
0
1
2
3
4
5
6
7
DC Bias/V  
Dimensions  
L
W
T
B
G
2.00mm +/-0.2mm  
1.25mm +/-0.2mm  
1.25mm +/-0.2mm  
0.20mm Min.  
|Z|, ESR vs. Freq. Characteristics  
Temperature Characteristics  
1000  
100  
10  
20  
10  
0
0.50mm Min.  
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
-90  
1
Temperature Characteristic  
0.1  
JB (-25 to 85 degC +/-10%)  
0.01  
0.001  
Rated Voltage  
0J (6.3Vdc)  
0.001  
0.01  
0.1  
1
10  
100  
1000  
-40  
-20  
0
20  
40  
60  
80  
100  
Capacitance  
Temperature/degC  
Frequency/MHz  
6.8uF  
|Z|  
ESR  
Temp.Chara.  
TCBias(1/2Rated)  
Capacitance Tolerance  
Cap. vs. Freq. Characteristic  
Ripple Temperature Rise Characteristics  
K (+/-10%)  
25  
20  
15  
10  
5
100  
Dissipation Factor  
10% Max.  
Insulation Resistance  
10  
14Mohm Min.  
AEC-Q200  
Not Applicable  
0
1
0.001  
0
1
2
3
4
5
6
0.01  
0.1  
1
10  
100  
1000  
Current/Arms  
Frequency/MHz  
100kHz  
500kHz  
1MHz  
January 3, 2016  
All specifications are subject to change without notice.  

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