BUK552-60B

更新时间： 2024-11-28 22:32:35

品牌	Logo	应用领域
恩智浦 - NXP		晶体晶体管
页数	文件大小	规格书
7页	57K
描述
PowerMOS transistor Logic level FET

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中文翻译

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数据手册

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BUK552-60B 数据手册

Philips Semiconductors

Product Specification

PowerMOS transistor

Logic level FET

BUK552-60A/B

GENERAL DESCRIPTION

QUICK REFERENCE DATA

N-channel enhancement mode

logic level field-effect power

SYMBOL

PARAMETER

MAX.

UNIT

transistor in a plastic envelope.

The device is intended for use in

Switched Mode Power Supplies

(SMPS), motor control, welding,

DC/DC and AC/DC converters, and

in automotive and general purpose

switching applications.

BUK552

-60A

175

0.15

-60B

175

0.18

V_DS

I_D

Drain-source voltage

Drain current (DC)

˚C

Ω

P_tot

T_j

Total power dissipation

Junction temperature

Drain-source on-state

R_DS(ON)

resistance;

V_GS= 5 V

PINNING - TO220AB

PIN CONFIGURATION

SYMBOL

DESCRIPTION

tab

gate

drain

source

tab drain

1 2 3

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134)

SYMBOL PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

V_DS

Drain-source voltage

V_DGR

±V_GS

±V_GSM

Drain-gate voltage

R_GS= 20 kΩ

Gate-source voltage

Non-repetitive gate-source voltage t_p≤ 50 µs

-60A

-60B

I_D

Drain current (DC)

T_mb= 25 ˚C

T_mb= 100 ˚C

T_mb= 25 ˚C

I_D

Drain current (DC)

I_DM

Drain current (pulse peak value)

P_tot

T_stg

T_j

Total power dissipation

Storage temperature

Junction Temperature

T_mb= 25 ˚C

- 55

175

˚C

THERMAL RESISTANCES

SYMBOL PARAMETER

CONDITIONS

MIN. TYP. MAX. UNIT

R_{th j-mb}

Thermal resistance junction to

2.5

K/W

mounting base

R_{th j-a}

Thermal resistance junction to

ambient

K/W

April 1993

Rev 1.100

12 3 4 5 6 7

中文翻译

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