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BUF600AP

更新时间: 2024-01-26 06:26:23
品牌 Logo 应用领域
BB 缓冲放大器
页数 文件大小 规格书
14页 249K
描述
HIGH-SPEED BUFFER AMPLIFIER

BUF600AP 技术参数

生命周期:TransferredReach Compliance Code:unknown
风险等级:5.69商用集成电路类型:VIDEO AMPLIFIER
JESD-30 代码:R-PDSO-G8功能数量:1
端子数量:8封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE认证状态:Not Qualified
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子形式:GULL WING
端子位置:DUALBase Number Matches:1

BUF600AP 数据手册

 浏览型号BUF600AP的Datasheet PDF文件第6页浏览型号BUF600AP的Datasheet PDF文件第7页浏览型号BUF600AP的Datasheet PDF文件第8页浏览型号BUF600AP的Datasheet PDF文件第10页浏览型号BUF600AP的Datasheet PDF文件第11页浏览型号BUF600AP的Datasheet PDF文件第12页 
TYPICAL PERFORMANCE CURVES (CONT)  
At VCC = ±5V, RLOAD = 100(BUF601), RLOAD = 200(BUF600), and TA = 25°C, unless otherwise noted.  
IQ vs TIME (Warmup)  
BUF600, BUF601 GAIN ERROR vs INPUT VOLTAGE  
100  
99  
98  
97  
96  
95  
94  
5
4
3
2
1
0
(Full Temperature Range, RLOAD = 10kΩ)  
BUF600  
BUF601  
BUF600  
BUF601  
0
1
2
3
4
5
6
7
8
–5 –4  
–3  
–2  
–1  
0
1
2
3
4
5
Input Voltage (V)  
Time (s)  
DISCUSSION OF  
PERFORMANCE  
The BUF600 and BUF601 are fabricated using a high-  
performance complementary bipolar process, which  
provides high-frequency NPN and PNP transistors with  
variations in source impedances. A resistor between 100Ω  
and 250in series with the buffer input lead will usually  
eliminate oscillation problems from inductive sources such  
as unterminated cables without sacrificing speed.  
gigahertz transition frequencies (f ). Power supplies are  
Τ
rated at ±6V maximum, with the data sheet parameters  
specified at ±5V supplies. The BUF600 and BUF601 are  
3-stage open-loop buffer amplifiers consisting of comple-  
mentary emitter followers with a symmetrical class AB  
Darlington output stage. The complementary structure pro-  
vides both sink and source current capability independent of  
the output voltage, while maintaining constant output and  
input impedances. The amplifiers use no feedback, so their  
low-frequency gain is slightly less than unity and somewhat  
dependent on loading. The optimized input stage is respon-  
sible for the high slew rate of up to 3600V/µs, wide large  
signal bandwidth of 320MHz, and quiescent current reduc-  
tion to ±3mA (BUF600) and ±6mA (BUF601). These  
features yield an excellent large signal bandwidth/quiescent  
current ratio of 320MHz, 5Vp-p at 3mA/6mA quiescent  
current. The complementary emitter followers of the input  
stage work with current sources as loads. The internal PTAT  
power supply controls their quiescent current and with  
its temperature characteristics keeps the transconductance  
of the buffer amplifiers constant. The Typical Performance  
Curves show the quiescent current variation versus  
temperature.  
Another excellent feature is the output-to-input isolation  
over a wide frequency range. This characteristic is very  
important when the buffer drives different equipment over  
cables. Often the cable is not perfect or the termination is  
incorrect and reflections arise that act like a signal source at  
the output of the buffer.  
Open-loop devices often sacrifice linearity and introduce  
frequency distortion when driving low load impedance. The  
BUF600 and BUF601, however, do not. Their design yields  
low distortion products. The harmonic distortion character-  
istics into loads greater than 100(BUF601) and greater  
than 200(BUF600) are shown in the Typical Performance  
Curves. The distortion can be improved even more by  
increasing the load resistance.  
Differential gain (DG) and differential phase (DP) are among  
the important specifications for video applications. DG is  
defined as the percent change in gain over a specified change  
in output voltage level (0V to 0.7V.) DP is defined as the  
phase change in degrees over the same output voltage  
change. Both DG and DP are specified at the PAL subcarrier  
frequency of 4.43MHz. The errors for differential gain are  
lower than 0.5%, while those for differential phase are lower  
than 0.04°.  
The cross current in the input stage is kept very low,  
resulting in a low input bias current of 0.7µA/1.5µA and  
high input impedance of 4.8M|| 1pF/2.5M|| 1pF. The  
second stage drives the output transistors and reduces the  
output impedance and the feedthrough from output to input  
when driving RLC loads.  
With its minimum 20mA long-term DC output current  
capability, 50mA pulse current, low output impedance over  
frequency, and stability to drive capacitive loads, the BUF601  
can drive 50and 75systems or lines. The BUF600 with  
lower quiescent current and therefore higher output imped-  
ance is well-suited primarily to interstage buffering. This  
type of open-loop amplifier is a new and easy-to-use step to  
prevent an interaction between two points in complex high-  
speed analog circuitry.  
The input of the BUF600 and BUF601 looks like a high  
resistance in parallel with a 1pF capacitance. The input  
characteristics change very little with output loading and  
input voltage swing. The BUF600 and BUF601 have excel-  
lent input-to-output isolation and feature high tolerance to  
®
9
BUF600, 601  

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