Datasheet
BU91501KV-M
I/O equivalent circuit
3
Figure 6. I/O equivalent circuit
Function descriptions
Command and Data Transfer Method
3-SPI (3-wire Serial Interface)
This device is controlled by a 3-wire signal (CSB, SCL, and SD).
First, Interface counter is initialized with CSB=“H"
Setting CSB=”L” enables SD and SCL inputs.
First, Interface counter is initialized with CSB=“H", and then CSB=”L” makes SD and SCL input enable.
The protocol of 3-SPI transfer is shown as follows.
Each command starts with D7 bit as MSB data, followed by D6 to D0 (this is while CSB =”L”).
(Internal data is latched at the rising edge of SCL, then the data is converted to an 8-bit parallel data at the falling edge of
the 8th CLK.)
When you rise CSB = “H”, in case command less than 8bit, command and data are canceled.
(1) Write Mode
Figure 7. 3-SPI Data Transfer Format
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8.July.2015 Rev.001
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