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BU4222F-TR PDF预览

BU4222F-TR

更新时间: 2024-11-30 12:36:55
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罗姆 - ROHM /
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描述
Low Voltage Free Delay Time Setting CMOS Voltage Detector IC Series

BU4222F-TR 数据手册

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Datasheet  
Voltage Detector IC Series  
Low Voltage Free Delay Time Setting  
CMOS Voltage Detector IC Series  
BU42xx series BU43xx series  
General Description  
Key Specifications  
„ Detection voltage:  
ROHM’s BU42xx and BU43xx series are CMOS Voltage  
Detector ICs with adjustable output delay. It is a  
high-accuracy, low current consumption Voltage Detector  
IC series with a built-in delay circuit. The lineup was  
established with two output types (Nch open drain and  
CMOS output) and detection voltages range from 0.9V to  
4.8V in increments of 0.1V, so that the series may be  
selected according to application.  
0.9V to 4.8V (Typ.)  
0.1V steps  
„ High accuracy detection voltage:  
„ Ultra-low current consumption:  
„ Operating temperature range:  
Package  
±1.0%  
0.55µA (Typ.)  
-40°C to +125°C  
SSOP5:  
2.90mm x 2.80mm x 1.25mm  
2.00mm x 2.10mm x 0.95mm  
1.60mm x 1.60mm x 0.60mm  
Features  
„ Delay Time Controlled by external Capacitor  
„ Two output types (Nch open drain and CMOS output)  
„ Ultra-low current consumption  
SOP4:  
VSOF5:  
„ Wide operating temperature range  
„ Very small and low height package  
„ Package SSOP5 and SOP4 is similar to SOT-23-5  
and SC-82 respectively (JEDEC)  
Applications  
Circuits using microcontrollers or logic circuits that require  
a reset.  
Typical Application Circuit  
VDD1  
VDD1  
VDD2  
RL  
Micro  
controller  
RST  
BU43xx  
Micro  
controller  
RST  
BU42xx  
CIN  
CT  
CT  
CIN  
CL  
CL  
(Capacitor for  
noise filtering)  
(Capacitor for  
noise filtering)  
GND  
GND  
Open Drain Output type  
BU42xx series  
CMOS Output type  
BU43xx series  
Connection Diagram & Pin Descriptions  
SSOP5  
TOP VIEW  
SOP4  
TOP VIEW  
VSOF5  
TOP VIEW  
VOUT  
4
CT  
3
N.C.  
CT  
GND VDD  
4
5
Lot. No  
Lot. No  
Marking  
Marking  
2 3  
1
Lot. No  
Marking  
VOUT VDD GND  
Symbol Function  
VOUT Reset output  
VOUT SUB CT  
1
2
GND  
VDD  
PIN  
No.  
PIN  
No.  
PIN  
No.  
Symbol  
Function  
Symbol  
VOUT Reset output  
SUB Substrate*  
Capacitor connection  
Function  
1
2
1
2
GND GND  
1
2
VDD Power supply voltage  
VDD  
Power supply voltage  
Capacitor connection  
terminal for output  
delay time  
3
4
5
GND GND  
3
4
CT  
3
4
5
CT  
terminal for output  
delay time  
N.C. Unconnected terminal  
Capacitor connection  
VOUT Reset output  
VDD Power supply voltage  
CT  
GND GND  
terminal for output  
delay time  
*Connect the substrate to VDD  
Product structureSilicon monolithic integrated circuit This product is not designed for protection against radioactive rays  
.www.rohm.com  
TSZ02201-0R7R0G300050-1-2  
2.Aug.2013 Rev.007  
© 2013 ROHM Co., Ltd. All rights reserved.  
1/13  
TSZ2211114001  

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