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BS62LV1023STC70 PDF预览

BS62LV1023STC70

更新时间： 2024-11-20 03:04:15
品牌 Logo 应用领域
BSI 静态存储器光电二极管
页数 文件大小 规格书
10页 421K
描述
Standard SRAM, 128KX8, 70ns, CMOS, PDSO32

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BS62LV1023STC70 数据手册

 浏览型号BS62LV1023STC70的Datasheet PDF文件第2页浏览型号BS62LV1023STC70的Datasheet PDF文件第3页浏览型号BS62LV1023STC70的Datasheet PDF文件第4页浏览型号BS62LV1023STC70的Datasheet PDF文件第5页浏览型号BS62LV1023STC70的Datasheet PDF文件第6页浏览型号BS62LV1023STC70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
128K X 8 bit  
BSI  
BS62LV1023  
„ DESCRIPTION  
„ FEATURES  
The BS62LV1023 is a high performance, very low power CMOS  
Static Random Access Memory organized as 131,072 words by 8 bits  
and operates from a wide range of 2.4V to 3.6V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.02uA and maximum access time of 70ns in 3V operation.  
Easy memory expansion is provided by an active LOW chip  
enable (CE1), an active HIGH chip enable (CE2), and active LOW  
output enable (OE) and three-state output drivers.  
The BS62LV1023 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
The BS62LV1023 is available in DICE form, JEDEC standard 32 pin  
450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP, 8mmx13.4  
mm STSOP and 8mmx20mm TSOP.  
• Vcc operation voltage : 2.4V ~ 3.6V  
• Very low power consumption :  
Vcc = 3.0V C-grade : 20mA (Max.) operating current  
I- grade : 25mA (Max.) operating current  
0.02uA (Typ.) CMOS standby current  
• High speed access time :  
-70  
70ns (Max.) at Vcc = 3.0V  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Easy expansion with CE2, CE1, and OE options  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
(ns)  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
STANDBY  
Operating  
(ICC, Max)  
PKG TYPE  
(ICCSB1, Max)  
Vcc= 3.0V  
Vcc=3.0V  
Vcc=3.0V  
BS62LV1023SC  
BS62LV1023TC  
BS62LV1023STC  
BS62LV1023PC  
BS62LV1023JC  
BS62LV1023DC  
BS62LV1023SI  
BS62LV1023TI  
BS62LV1023STI  
BS62LV1023PI  
BS62LV1023JI  
BS62LV1023DI  
SOP-32  
TSOP-32  
STSOP-32  
PDIP-32  
SOJ-32  
DICE  
SOP-32  
TSOP-32  
STSOP-32  
PDIP-32  
SOJ-32  
DICE  
+0 O C to +70 O  
C
C
2.4V ~ 3.6V  
2.4V ~ 3.6V  
70  
1.0uA  
20mA  
-40 O C to +85 O  
70  
1.5uA  
25mA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
NC  
A16  
A14  
A12  
A7  
1
VCC  
32  
2
A15  
CE2  
WE  
A13  
A8  
31  
A6  
A7  
A12  
A14  
A16  
A15  
A13  
A8  
3
30  
4
29  
5
Address  
28  
27  
Memory Array  
1024 x 1024  
20  
1024  
A6  
6
Row  
Decoder  
Input  
A5  
7
A9  
BS62LV1023SC 26  
A4  
8
BS62LV1023SI  
BS62LV1023PC  
BS62LV1023PI  
BS62LV1023JC  
BS62LV1023JI  
A11  
OE  
25  
24  
23  
22  
21  
20  
19  
18  
17  
Buffer  
A3  
9
A2  
10  
11  
12  
13  
14  
15  
16  
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
A9  
A11  
A1  
A0  
DQ0  
DQ1  
DQ2  
GND  
1024  
DQ0  
DQ1  
DQ2  
DQ3  
DQ4  
DQ5  
DQ6  
DQ7  
8
Data  
Input  
Buffer  
8
Column I/O  
Write Driver  
Sense Amp  
8
8
Data  
Output  
Buffer  
1
2
3
4
5
6
7
8
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
A11  
A9  
A8  
OE  
128  
Column Decoder  
14  
A10  
CE1  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
GND  
DQ2  
DQ1  
DQ0  
A0  
A13  
WE  
CE2  
A15  
VCC  
NC  
A16  
A14  
A12  
A7  
BS62LV1023TC  
CE2  
CE1  
WE  
BS62LV1023STC  
BS62LV1023TI  
BS62LV1023STI  
Control  
Address Input Buffer  
9
10  
11  
12  
13  
14  
15  
16  
OE  
Vdd  
Gnd  
A5 A4 A3 A2 A1 A0 A10  
A6  
A5  
A4  
A1  
A2  
A3  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 2.3  
Jan. 2004  
R0201-BS62LV1023  
1
1234567...10

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