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BS616LV2016AC70 PDF预览

BS616LV2016AC70

更新时间: 2024-12-01 14:48:15
品牌 Logo 应用领域
BSI 静态存储器内存集成电路
页数 文件大小 规格书
9页 264K
描述
Standard SRAM, 128KX16, 70ns, CMOS, PBGA48

BS616LV2016AC70 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Obsolete包装说明:FBGA, BGA48,6X8,30
Reach Compliance Code:unknown风险等级:5.92
Is Samacsys:N最长访问时间:70 ns
I/O 类型:COMMONJESD-30 代码:R-PBGA-B48
JESD-609代码:e0内存密度:2097152 bit
内存集成电路类型:STANDARD SRAM内存宽度:16
湿度敏感等级:3端子数量:48
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:128KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA48,6X8,30
封装形状:RECTANGULAR封装形式:GRID ARRAY, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):240
电源:2.5/5 V认证状态:Not Qualified
最大待机电流:7e-7 A最小待机电流:1.5 V
子类别:SRAMs最大压摆率:0.055 mA
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

BS616LV2016AC70 数据手册

 浏览型号BS616LV2016AC70的Datasheet PDF文件第2页浏览型号BS616LV2016AC70的Datasheet PDF文件第3页浏览型号BS616LV2016AC70的Datasheet PDF文件第4页浏览型号BS616LV2016AC70的Datasheet PDF文件第5页浏览型号BS616LV2016AC70的Datasheet PDF文件第6页浏览型号BS616LV2016AC70的Datasheet PDF文件第7页 
Very Low Power/Voltage CMOS SRAM  
128K X 16 bit  
BSI  
BS616LV2016  
„ FEATURES  
• Fully static operation  
• Data retention supply voltage as low as 1.5V  
• Wide Vcc operation voltage : 2.4V ~ 5.5V  
• Very low power consumption :  
• Easy expansion with CE and OE options  
• I/O Configuration x8/x16 selectable by LB and UB pin  
Vcc = 3.0V C-grade: 29mA (@55ns) operating current  
I -grade: 30mA (@55ns) operating current  
C-grade: 24mA (@70ns) operating current  
I -grade: 25mA (@70ns) operating current  
0.3uA(Typ.) CMOS standbycurrent  
Vcc = 5.0V C-grade: 60mA (@55ns) operating current  
I -grade: 62mA (@55ns) operating current  
C-grade: 53mA (@70ns) operating current  
I -grade: 55mA (@70ns) operating current  
1.0uA(Typ.) CMOS standbycurrent  
„ DESCRIPTION  
The BS616LV2016 is a high performance , very low power CMOS Static  
Random Access Memory organized as 131,072 words by 16 bits and  
operates from a wide range of 2.4V to 5.5V supply voltage.  
Advanced CMOS technology and circuit techniques provide both high  
speed and low power features with a typical CMOS standby current of  
0.3uA at 3.0V/25oC and maximum access time of 55ns at 3.0V/85oC.  
Easy memory expansion is provided by active LOW chip enable (CE),  
active LOW output enable(OE) and three-state output drivers.  
The BS616LV2016 has an automatic power down feature, reducing the  
power consumption significantly when chip is deselected.  
• High speed access time :  
-55  
-70  
55ns  
70ns  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
The BS616LV2016 is available in DICE form , JEDEC standard 44-pin  
TSOP Type II package and 48-ball BGA package.  
„ PRODUCT FAMILY  
POWER DISSIPATION  
SPEED  
( ns )  
STANDBY  
Operating  
PRODUCT  
FAMILY  
OPERATING  
TEMPERATURE  
Vcc  
RANGE  
( ICCSB1, Max )  
( ICC, Max )  
PKG TYPE  
55ns: 3.0~5.5V  
70ns: 2.7~5.5V  
Vcc=3.0V  
70ns  
Vcc=5.0V  
70ns  
Vcc=3.0V  
Vcc=5.0V  
BS616LV2016DC  
BS616LV2016EC  
BS616LV2016AC  
BS616LV2016DI  
BS616LV2016EI  
BS616LV2016AI  
DICE  
+0 O C to +70O  
-40 O C to +85O  
C
C
2.4V ~5.5V  
2.4V ~ 5.5V  
55/70  
55/70  
3.0uA  
5.0uA  
53mA  
10uA  
24mA  
25mA  
TSOP2-44  
BGA-48-0608  
DICE  
TSOP2-44  
BGA-48-0608  
30uA  
55mA  
„ PIN CONFIGURATIONS  
„ BLOCK DIAGRAM  
1
44  
43  
A4  
A5  
2
A3  
A6  
3
42  
A2  
A1  
A7  
4
41  
A8  
A13  
OE  
5
40  
A0  
UB  
6
39  
CE  
LB  
A15  
7
Address  
38  
37  
DQ0  
DQ15  
DQ14  
20  
8
9
A16  
A14  
1024  
DQ1  
36  
Input  
DQ2  
DQ13  
Row  
Memory Array  
1024 x 2048  
10  
35  
DQ3  
DQ12  
A12  
A7  
BS616LV2016EC  
BS616LV2016EI  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
34  
33  
VCC  
GND  
DQ4  
DQ5  
DQ6  
DQ7  
WE  
GND  
Buffer  
Decoder  
VCC  
32  
31  
A6  
A5  
A4  
DQ11  
DQ10  
DQ9  
30  
29  
DQ8  
2048  
28  
NC  
Data  
Input  
Buffer  
27  
A16  
A15  
A14  
A13  
A12  
A8  
16  
16  
16  
Column I/O  
26  
25  
A9  
DQ0  
A10  
.
.
.
.
.
.
.
.
Write Driver  
Sense Amp  
24  
A11  
23  
NC  
128  
Data  
Output  
1
2
3
4
5
6
16  
Buffer  
Column Decoder  
DQ15  
A
B
C
D
E
F
LB  
D8  
D9  
OE  
UB  
A0  
A3  
A1  
A4  
A2  
N.C.  
D0  
14  
CE  
D1  
D3  
CE  
WE  
OE  
UB  
Control  
Address Input Buffer  
D10  
D11  
D12  
D13  
A5  
A6  
D2  
N.C.  
VSS  
A7  
VCC  
VSS  
LB  
A11 A9 A3 A2 A1  
A0 A10  
VCC  
N.C.  
A14  
A12  
A9  
A16  
A15  
A13  
A10  
D4  
D5  
Vcc  
Gnd  
D14  
D15  
N.C.  
D6  
D7  
WE  
G
H
N.C.  
A8  
N.C.  
A11  
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.  
Revision 1.1  
R0201-BS616LV2016  
1
Jan.  
2004  

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