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BR573D

更新时间: 2022-04-26 23:25:01
品牌 Logo 应用领域
飞思卡尔 - FREESCALE /
页数 文件大小 规格书
441页 2488K
描述
Integrated Processor with DMA User’s Manual

BR573D 数据手册

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11/2/95  
SECTION 1: OVERVIEW  
UM Rev.1.0  
Freescale Semiconductor, Inc.  
TABLE OF CONTENTS (Continued)  
Paragraph  
Number  
Page  
Number  
Title  
2.7  
Bus Control Signals .........................................................................................2-6  
Data and Size Acknowledge (DSACK1, DSACK0)................................2-6  
Address Strobe (AS)....................................................................................2-6  
Data Strobe (DS)...........................................................................................2-7  
Transfer Size (SIZ1, SIZ0)..........................................................................2-7  
Read/Write (R/W)...........................................................................................2-7  
Bus Arbitration Signals....................................................................................2-7  
Bus Request (BR)..........................................................................................2-7  
Bus Grant (BG)...............................................................................................2-7  
Bus Grant Acknowledge (BGACK).............................................................2-7  
Read-Modify-Write Cycle (RMC).................................................................2-8  
Exception Control Signals..............................................................................2-8  
Reset (RESET)...............................................................................................2-8  
Halt (HALT)....................................................................................................2-8  
Bus Error (BERR)...........................................................................................2-8  
Clock Signals....................................................................................................2-8  
System Clock (CLKOUT)............................................................................2-8  
Crystal Oscillator (EXTAL, XTAL)...............................................................2-9  
External Filter Capacitor (XFC)..................................................................2-9  
Clock Mode Select (MODCK).....................................................................2-9  
Instrumentation and Emulation Signals.......................................................2-9  
Instruction Fetch (IFETCH)..........................................................................2-9  
Instruction Pipe (IPIPE)...............................................................................2-9  
Breakpoint (BKPT)........................................................................................2-10  
Freeze (FREEZE)..........................................................................................2-10  
DMA Module Signals.......................................................................................2-10  
DMA Request (DREQ2, DREQ1).................................................................2-10  
DMA Acknowledge (DACK2, DACK1)......................................................2-10  
DMA Done (DONE2, DONE1)......................................................................2-10  
Serial Module Signals.....................................................................................2-11  
Serial Crystal Oscillator (X2, X1) ...............................................................2-11  
Serial External Clock Input (SCLK)...........................................................2-11  
Receive Data (RxDA, RxDB).......................................................................2-11  
Transmit Data (TxDA, TxDB).......................................................................2-11  
Clear to Send (CTSA, CTSB).....................................................................2-11  
Request to Send (RTSA, RTSB)................................................................2-11  
Transmitter Ready (TRDYA).....................................................................2-11  
Receiver Ready (RRDYA) .........................................................................2-12  
Timer Signals....................................................................................................2-12  
Timer Gate (TGATE2, TGATE1)................................................................2-12  
Timer Input (TIN2, TIN1)..............................................................................2-12  
Timer Output (TOUT2, TOUT1)...................................................................2-12  
2.7.1  
2.7.2  
2.7.3  
2.7.4  
2.7.5  
2.8  
2.8.1  
2.8.2  
2.8.3  
2.8.4  
2.9  
2.9.1  
2.9.2  
2.9.3  
2.10  
2.10.1  
2.10.2  
2.10.3  
2.10.4  
2.11  
2.11.1  
2.11.2  
2.11.3  
2.11.4  
2.12  
2.12.1  
2.12.2  
2.12.3  
2.13  
2.13.1  
2.13.2  
2.13.3  
2.13.4  
2.13.5  
2.13.6  
2.13.7  
2.13.8  
2.14  
2.14.1  
2.14.2  
2.14.3  
iv  
MC68340 USER'S MANUAL  
MOTOROLA  
For More Information On This Product,  
Go to: www.freescale.com  

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