BQ2204ASN-N PDF预览

BQ2204ASN-N

更新时间: 2025-07-20 12:33:03
品牌 Logo 应用领域
德州仪器 - TI 静态存储器控制器
页数 文件大小 规格书
13页 395K
描述
X4 SRAM Nonvolatile Controller Unit

BQ2204ASN-N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.34
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:9.9 mm湿度敏感等级:2
信道数量:1功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Power Management Circuits最大供电电流 (Isup):6 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
阈值电压标称:5处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.91 mmBase Number Matches:1

BQ2204ASN-N 数据手册

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bq2204A  
X4 SRAM Nonvolatile Controller Unit  
During a power failure, the external  
General Description  
Features  
SRAMs are switched from the V  
CC  
supply to one of two 3V backup sup-  
plies. On a subsequent power-up, the  
SRAMs are write-protected until a  
power-valid condition exists.  
The CMOS bq2204A SRAM Non-  
volatile Controller Unit provides all  
necessary functions for converting  
up to four banks of standard CMOS  
SRAM into nonvolatile read/write  
memory.  
Power monitoring and switching  
for 3-volt battery-backup applica-  
tions  
Du r in g power-va lid oper a t ion , a  
two-input decoder transparently se-  
lect s on e of u p t o fou r ba n ks of  
SRAM.  
Write-protect control  
2-input decoder for control of up  
to 4 banks of SRAM  
A precision comparator monitors the 5V  
V
CC  
input for an out-of-tolerance condi-  
3-volt primary cell inputs  
tion. When out-of-tolerance is detected,  
the four conditioned chip-enable outputs  
are forced inactive to write-protect up to  
four banks of SRAM.  
L e s s t h a n 1 0 n s ch ip -e n a b le  
propagation delay  
5% or 10% supply operation  
Pin Connections  
Pin Names  
VOUT  
BC1–BC2  
THS  
Supply output  
3 volt primary backup cell inputs  
Threshold select input  
V
1
2
3
4
5
6
16  
15  
14  
13  
12  
11  
V
CC  
OUT  
BC  
2
BC  
CE  
CE  
CE  
CE  
1
CE  
chip-enable active low input  
Conditioned chip-enable outputs  
NC  
A
CECON1  
CECON4  
CON1  
CON2  
CON3  
CON4  
B
A–B  
NC  
Decoder inputs  
No connect  
NC  
THS  
7
8
10  
9
CE  
NC  
VCC  
VSS  
+5 volt supply input  
Ground  
V
SS  
16-Pin Narrow DIP or SOIC  
PN220401.eps  
Functional Description  
Up to four banks of CMOS static RAM can be battery-  
backed using the V and conditioned chip-enable out-  
If THS is tied to V , power-fail detection occurs at  
CC  
4.37V typical for 10% supply operation. The THS pin  
OUT  
put pins from the bq2204A. As V  
slews down during  
must be tied to V or V for proper operation.  
CC  
SS CC  
a power failure, the conditioned chip-enable outputs  
CE through CE are forced inactive independ-  
ent of the chip-enable input CE.  
If a memory access is in process to any of the four external  
banks of SRAM during power-fail detection, that memory  
cycle continues to completion before the memory is write-  
protected. If the memory cycle is not terminated within  
CON1  
CON4  
This activity unconditionally write-protects the external  
SRAM as V  
falls below an out-of-tolerance threshold  
time t  
, all four chip-enable outputs are unconditionally  
CC  
WPT  
V
PFD  
. V  
is selected by the threshold select input pin, driven high, write-protecting the controlled SRAMs.  
PFD  
THS. If THS is tied to V , the power-fail detection occurs  
SS  
at 4.62V typical for 5% supply operation.  
Dec. 1992 B  
1

BQ2204ASN-N 替代型号

型号 品牌 替代类型 描述 数据表
BQ2204ASNTRG4 TI

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X4 SRAM Nonvolatile Controller Unit
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