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BM3G015MUV-LB PDF预览

BM3G015MUV-LB

更新时间: 2024-03-03 10:10:49
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罗姆 - ROHM /
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描述
This is the product guarantees long time support in industrial market. BM3G015MUV-LB provides an o

BM3G015MUV-LB 数据手册

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BM3G015MUV-LB  
Description of Blocks – continued  
3
Start Sequence  
Start sequence is shown in Figure 1, Figure 2 and see the sections below for detailed descriptions.  
3.1  
Start Sequence (LDOEN pin = OPEN)  
VUVLO1  
VDD pin voltage  
VOFF  
0 V  
VUVP1  
LDO5V pin voltage  
0 V  
5 V  
PG pin voltage  
tD_PG  
(E.g. Pulled up to 5 V  
externally by 100 kΩ  
tLDO5V  
tD_IN  
IN Pin State  
for Input Signal  
Invalid  
Valid  
A1  
B1  
C1  
D1  
E1  
Figure 1. Start Sequences Timing Chart (LDOEN pin = OPEN)  
A1:  
When the VDD pin voltage exceeds VOFF, the IC becomes to operational state, and the PG pin state becomes  
pulled down internally.  
B1:  
C1:  
When the VDD pin voltage exceeds VUVLO1, the IC starts to operate, and the LDO5V pin voltage starts to rise.  
The IC is ready for an input signal from the IN pin after tD_IN from B1. It becomes possible to drive the integrated  
GaN HEMT.  
D1:  
E1:  
When the LDO5V pin voltage exceeds VUVP1, the conditions for outputting power good signal are satisfied.  
The time from B1 to D1 is defined as tLDO5V  
.
The PG pin state changes from internally pulled down to a high impedance after tD_PG from D1.  
3.2  
Start Sequence (LDOEN pin = GND)  
VDD pin voltageV  
UVLO1  
VOFF  
0 V  
0 V  
LDO5V pin voltage  
5 V  
PG pin voltage  
tD_PG  
(E.g. Pulled up to 5 V  
externally by 100 kΩ)  
tD_IN  
IN Pin State  
for Input Signal  
Invalid  
Valid  
A2  
B2  
C2  
D2  
Figure 2. Start Sequences Timing Chart (LDOEN pin = GND)  
A2:  
B2:  
C2:  
D2:  
Same as A1.  
When the VDD pin voltage exceeds VUVLO1, the IC starts to operate.  
Same as C1.  
The PG pin state changes from internally pulled down to a high impedance after tD_PG from C2.  
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© 2022 ROHM Co., Ltd. All rights reserved.  
TSZ22111 • 15 • 001  
TSZ02201-0F1F0A100090-1-2  
13.Jan.2023 Rev.001  
6/26  

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