Datasheet > BD5309G-2M

BD5309G-2M

更新时间： 2023-09-03 20:24:52

品牌	Logo	应用领域
罗姆 - ROHM		电容器
页数	文件大小	规格书
23页	2305K
描述
罗姆的延迟时间自由设置型CMOS电压检测器IC系列是内置了采用CMOS工艺的高精度、低消耗电流延迟电路的CMOS RESET IC系列。可通过外接电容器设定延迟时间。为保证客户可根据应用进行选择，备有Nch漏极开路输出(BD52xx-2M)系列和CMOS输出(BD53xx-2M)系列产品。备有检测电压为0.9V～5.0V的0.1V阶跃的产品阵容。在-40°C到105°C的整个工作温度范围内，将延迟时间精度控制在±30%内。

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BD5309G-2M 数据手册

BD52xx-2M Series BD53xx-2M Series

Operational Notes – continued

12. Regarding Input Pins of the IC

In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation

of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage.

Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower

than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply

voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages

within the values specified in the electrical characteristics of this IC

13. Ceramic Capacitor

When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with

temperature and the decrease in nominal capacitance due to DC bias and others

14. Area of Safe Operation (ASO)

Operate the IC such that the output voltage, output current, and the maximum junction temperature rating are all within

the Area of Safe Operation (ASO).

15. Bypass Capacitor for Noise Rejection

To help reject noise, put more than 0.1µF capacitor between VDD pin and GND. Be careful when using extremely big

capacitor as transient response will be affected.

16. The V_DDline impedance might cause oscillation because of the detection current.

17. A V_DDto GND capacitor (as close connection as possible) should be used in high V_DDline impedance condition.

18. External Parameters

The recommended value of C_TCapacitor is from open to 4.7µF and pull-up resistance value is 50kΩ to 1MΩ. There are

many factors (board layout, etc) that can affect characteristics. Operating beyond the recommended values does not

guarantee correct operation. Please verify and confirm using practical applications.

19. When V_DDfalls below the minimum operating voltage, output will be open. When output is connected to pull-up voltage,

output will be equivalent to pull-up voltage.

20. Power-on Reset Operation

Please note that the power on reset output varies with the VDD rise time. Please verify the behavior in the actual

operation.

21. CT Pin Discharge

Due to the capabilities of the CT pin discharge transistor, the CT pin may not completely discharge when a short input

pulse is applied, and in this case the delay time may not be controlled. Please verify the actual operation.

22. This IC has extremely high impedance pins. Small leak current due to the uncleanness of PCB surface might cause

unexpected operations. Application values in these conditions should be selected carefully. If 10MΩ leakage is assumed

between the CT and GND pin, it is recommended to insert 1MΩ resistor between CT and VDD pin. However, delay time

will change when resistor is connected externally to CT pin so verify the delay time requirements when using this set-up.

Also, when similar leakage is assumed between VOUT and GND pin, consider to set the value of pull up resistor lower

than 1/10 of the impedance of assumed leakage route.

www.rohm.com

TSZ02201-0GIG0G300010-1-2

18/20

TSZ22111・15・001

05.Jul.2018 Rev.002

1...15 16 171819 20 21...23

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BD53108G-CZ (新产品)	ROHM	获取价格	BD53108G-CZ is S pole detection Hall IC with wide VDD voltage range and wide operation tem
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BD5310G-2M	ROHM	获取价格	罗姆的延迟时间自由设置型CMOS电压检测器IC系列是内置了采用CMOS工艺的高精度、低消耗
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