BD16951EFV-M
Pin Description
Pin No.
Pin Name
Function
Power supply terminal used for charge pump and low side driver.
A capacitor ( CVS =1.0μF (Typ) ) is recommended to be located as close as possible to this
pin and PGND.
1
VS
2
3
CP
DRAIN
GH1
Charge pump output. Connect CCP1=0.1μF to VS.
High side monitor input from external MOSFET drain for over current and under voltage
protection.
Gate driver output to external MOSFET high-side switch in half-bridge. Connect to Gate
4
5
6
terminal of high-side external MOSFET.
Source/Drain of half-bridge.
Connect to Source / Drain terminal of external MOSFET high/low-side.
SH1
GH2
Gate driver output to external MOSFET high-side switch in half-bridge. Connect to Gate
terminal of high-side external MOSFET.
Source/Drain of half-bridge.
Connect to Source / Drain terminal of external MOSFET high/low-side.
7
8
SH2
N.C.
Pin not connected internally.(Note1)
Gate driver output to external MOSFET low-side switch in half-bridge.
Connect to Gate terminal of low-side external MOSFET.
Gate driver output to external MOSFET low-side switch in half-bridge.
Connect to Gate terminal of low-side external MOSFET.
GL1
GL2
9
10
11
12
13
14
SL
Low-side monitor at external MOSFET Source for over current protection
Power Ground Connector.
Connected to Charge pump, High side driver and Low side driver.
PGND
PWM2 input for Half-bridge (GH2 and GL2) control. This input has a pull-down resister.
PWM2
RSTB
Reset input. The Reset input has a pull-down resistor. RSTB=Low will put the BD16951EFV
into Reset condition from any state.
Chip Select Bar: this input is low active and requires CMOS logic levels.
The serial data transfer between BD16951EFV and MCU is enabled by pulling the input CSB
to low-level. This input has a pull-up resister.
15
CSB
Serial clock input: this input controls the internal shift register of the
SCLK
SO
16
17
SPI and requires CMOS logic levels. This input has a pull-down resister.
Serial data out: SPI data sent to the MCU by the BD16951EFV. When CSB is High, the pin is
in the high-impedance state.
Serial data in: the input requires CMOS logic levels and receives serial data from the MCU.
The communication is organized in 16bit control words and the most significant bit (MSB) is
transferred first. This input has a pull-down resister.
SI
18
Analog blocks and logic voltage supply 3.3V or 5V : for this input a CVCC =0.1μF (Typ)
capacitor as close as possible to SGND is recommended.
19
20
VCC
PWM1 input for Half-bridge (GH1 and GL1) control. This input has a pull-down resister.
PWM1
SGND
CPM
Ground terminal Connect to THERMAL PAD for heat dissipation.
Connected to Logic and analog circuit.
Charge pump pin for capacitor, negative side.
Connect CCP2 =0.1μF (Typ) to CPP terminal.
21
22
23
N.C.
Pin not connected internally.(Note1)
Charge pump pin for capacitor, positive side.
Connect CCP2 =0.1μF (Typ) to CPM terminal.
24
CPP
THERMAL PAD
THERMAL PAD for heat dissipation. Connect to SGND terminal.
(Note1) Please be sure to floating at N.C. pin.
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may damage the IC.
Avoid nearby pins being shorted to each other especially to ground, power supply or output pin. Inter-pin shorts could be due
to many reasons such as metal particles, water droplets (in very humid environment) or unintentional solder bridge deposited
in between pins during assembly.
www.rohm.com
© 2022 ROHM Co., Ltd. All rights reserved.
TSZ22111･15･001
TTSSZZ0022220011--00GF3YFG01BCDF0000025300--11--22
3/52
13.JAN.2023 Rev.001
5秒后页面跳转
深入解析CS8416引脚说明、参数、技术特点
TPA3116D2功放芯片参数详解、引脚说明
移位寄存器74HC165引脚说明、驱动程序示例解读
深入解析AD9833：DDS频率合成器的卓越性能与广泛应用
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
