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BCR10PN_07 PDF预览

BCR10PN_07

更新时间: 2022-12-18 03:47:14
品牌 Logo 应用领域
英飞凌 - INFINEON 晶体数字晶体管
页数 文件大小 规格书
7页 141K
描述
NPN/PNP Silicon Digital Transistor Array

BCR10PN_07 数据手册

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BCR10PN  
NPN/PNP Silicon Digital Transistor Array  
Switching circuit, inverter, interface circuit,  
driver circuit  
4
5
6
3
2
Two (galvanic) internal isolated NPN/PNP  
Transistors in one package  
1
Built in bias resistor NPN and PNP  
(R =10 k, R =10 k)  
Pb-free (RoHS compliant) package  
1
2
C1  
6
B2  
5
E2  
4
1)  
R2  
Qualified according AEC Q101  
R1  
TR2  
TR1  
R1  
R2  
1
2
3
E1  
B1  
C2  
EHA07176  
Tape loading orientation  
Marking on SOT-363 package  
(for example W1s)  
corresponds to pin 1 of device  
Top View  
6 5 4  
W1s  
Position in tape: pin 1  
opposite of feed hole side  
1 2 3  
Direction of Unreeling  
EHA07193  
Type  
BCR10PN  
Marking  
W1s  
Pin Configuration  
1=E1 2=B1 3=C2 4=E2 5=B2 6=C1  
Package  
SOT363  
Maximum Ratings for NPN and PNP Types  
Parameter  
Symbol  
Value  
Unit  
Collector-emitter voltage  
Collector-base voltage  
V
V
50  
50  
V
CEO  
CBO  
Input forward voltage  
Input reverse voltage  
DC collector current  
Total power dissipation, T = 115 °C  
Junction temperature  
Storage temperature  
V
V
40  
10  
100  
250  
150  
i(fwd)  
i(rev)  
I
mA  
mW  
°C  
C
P
T
j
T
tot  
S
-65 ... 150  
stg  
Thermal Resistance  
Junction - soldering point  
2)  
R
140  
K/W  
thJS  
1
2
Pb-containing package may be available upon special request  
For calculation of R  
please refer to Application Note Thermal Resistance  
thJA  
2007-07-24  
1

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