Datasheet > BCM5616

BCM5616

更新时间： 2024-11-24 23:34:51

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
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描述

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数据手册

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BCM5616 数据手册

P ROD^BU^CC^{M 5}T^{6 1 6}

Brie f

S t ra t a S w it c h II™ BCM5 6 1 6 INTEGRATED MULTILAYER S WITCH

B C M 5 6 1 6 F E A T U R E S

S U M M A R Y O F B E N E F I T S

24 10/100-Mbps and 2 10/100/1000-Mbps Ethernet ports

6.6 Mpps (line rate) switching

New service offerings for ISPs.

• Pay for bandwidth consumption.

• Voice over IP.

• Police over-consumption of network resources.

• Line rate switching on all ports.

•

1–4 Classes of Service (COS); map to 802.1p priority

IGMP snooping

Greater insight to network resource utilization

through the advanced FFP features.

Integrated (8k) L2 table with auto learning

Integrated (256 KB) data packet memory

64 or 128-bit wide SDRAM support

Spanning tree per VLAN

•

More efficient deployment of existing network

resources through insight provided by

StrataSwitch II^TMfeature set.

DiffServ compliant

Stacking architecture compatible with StrataSwitch I^TM

Line rate switching on all ports for:

• Layer 2 switching.

• All FFP actions — steering, forwarding, reclassifying.

•

IEEE 802.1Q.D support

Low power of device, 5W (<250 mW/ FE port),

enables low-cost power supplies.

•

Fast filter processor (FFP)

• Examines up to the 80th byte of a packet

• Supports ToS and DiffServ field modification

• Bandwith regulation and monitoring per network flow

• Network data flow tracking granular to 1 Mbps

High level of integration minimizes PCB layer count

and routing issues.

Flexible (128 or 64 bit) SDRAM interface supports low

system cost of memory.

BCM5 6 1 6 Ap p lic a t io n Dia g ra m

2Mx32

SDRAM

2Mx32

SDRAM

2Mx32

SDRAM

2Mx32

SDRAM

PCI

Bus

S t ra t a S w it c h II^TMBCM5 6 1 6

BCM5238

BCM5402

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