VCE6467T, AVCE6467T
www.ti.com
SPRS690–MARCH 2011
VCE6467T, AVCE6467T
Digital Media System-on-Chip
Check for Samples: VCE6467T, AVCE6467T
1 Digital Media System-on-Chip (DMSoC)
1.1 Features
12
Set-Associative)
– 128K-Byte L2 Unified Mapped RAM/Cache
(Flexible RAM/Cache Allocation)
• High-Performance Digital Media SoC
– 1-GHz C64x+™ Clock Rate
– 500-MHz ARM926EJ-S™ Clock Rate
– Eight 32-Bit C64x+ Instructions/Cycle
– 8000 C64x+ MIPS
– Fully Software-Compatible With C64x /
ARM9™
• ARM926EJ-S Core
– Support for 32-Bit and 16-Bit (Thumb®
Mode) Instruction Sets
– DSP Instruction Extensions and Single Cycle
MAC
– ARM® Jazelle® Technology
– EmbeddedICE-RT™ Logic for Real-Time
Debug
– Industrial Temperature Devices Available
• Advanced Very-Long-Instruction-Word (VLIW)
TMS320C64x+™ DSP Core
– Eight Highly Independent Functional Units
• ARM9 Memory Architecture
•
Six ALUs (32-/40-Bit), Each Supports
Single 32-Bit, Dual 16-Bit, or Quad 8-Bit
Arithmetic per Clock Cycle
– 16K-Byte Instruction Cache
– 8K-Byte Data Cache
– 32K-Byte RAM
– 8K-Byte ROM
•
Two Multipliers Support Four 16 x 16-Bit
Multiplies (32-Bit Results) per Clock
Cycle or Eight 8 x 8-Bit Multiplies (16-Bit
Results) per Clock Cycle
• Video Communications Engine Software
– Point-to-Point SIP Video Calling
– Up to 720p30 Resolution and Frame Rate
– Low-Latency and A/V Synchronization
– Integrated Bandwidth Management Control
– Basic Package Included [AVCE6467T Only]
– Load-Store Architecture With Non-Aligned
Support
– 64 32-Bit General-Purpose Registers
– Instruction Packing Reduces Code Size
– All Instructions Conditional
– Forward Error Correction (FEC) [AVCE6467T
Only]
– Audio Codecs
– Additional C64x+™ Enhancements
•
•
Protected Mode Operation
Exceptions Support for Error Detection
and Program Redirection
Hardware Support for Modulo Loop
Operation
•
•
G.711
G.722 [AVCE6467T Only]
•
– Video Codecs
•
•
H.264 AVC
H.264 SVC (Scalable Video Coding)
[AVCE6467T Only]
• C64x+ Instruction Set Features
– Byte-Addressable (8-/16-/32-/64-Bit Data)
– 8-Bit Overflow Protection
• Embedded Trace Buffer™ (ETB11™) With 4KB
Memory for ARM9 Debug
• Endianness: Little Endian for ARM and DSP
• Dual Programmable High-Definition Video
Image Co-Processor (HDVICP) Engines
– Bit-Field Extract, Set, Clear
– Normalization, Saturation, Bit-Counting
– Compact 16-Bit Instructions
– Additional Instructions to Support Complex
Multiplies
– Supports a Range of Encode, Decode, and
Transcode Operations
• C64x+ L1/L2 Memory Architecture
– 32K-Byte L1P Program RAM/Cache (Direct
Mapped)
– 32K-Byte L1D Data RAM/Cache (2-Way
•
H.264, MPEG2, VC1, MPEG4 SP/ASP
• 108-MHz Video Port Interface (VPIF)
– Two 8-Bit SD (BT.656), Single 16-Bit HD
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
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