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ATXMEGA16E5 PDF预览

ATXMEGA16E5

更新时间: 2024-11-19 02:52:43
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
153页 2054K
描述
XMEGA® E5 Data Sheet

ATXMEGA16E5 数据手册

 浏览型号ATXMEGA16E5的Datasheet PDF文件第2页浏览型号ATXMEGA16E5的Datasheet PDF文件第3页浏览型号ATXMEGA16E5的Datasheet PDF文件第4页浏览型号ATXMEGA16E5的Datasheet PDF文件第5页浏览型号ATXMEGA16E5的Datasheet PDF文件第6页浏览型号ATXMEGA16E5的Datasheet PDF文件第7页 
ATxmega32E5/16E5/8E5  
XMEGA E5 Data Sheet  
®
Introduction  
®
®
The AVR XMEGA E5 is a family of low power, high performance, and peripheral rich 8/16-bit microcon-  
trollers based on the AVR enhanced RISC architecture. The XMEGA E5 is a 32-pins device ranging from  
8KB to 32KB Flash, with 1KB to 4KB SRAM, 512Bytes to 1KB EEPROM and up to 4KB boot section. The  
ATxmegaE5 devices operate at a maximum frequency of 32MHz. By executing instructions in a single  
clock cycle, the devices achieve CPU throughput approaching one million instructions per second (MIPS)  
per megahertz, allowing the system designer to optimize power consumption versus processing speed.  
Features  
®
®
High-performance, low-power AVR XMEGA 8/16-bit Microcontroller  
Nonvolatile program and data memories  
8K –32KB of in-system self-programmable flash  
2K – 4KB boot section  
512Bytes – 1KB EEPROM  
1K – 4KB internal SRAM  
Peripheral features  
Four-channel enhanced DMA controller with 8/16-bit address match  
Eight-channel event system  
Asynchronous and synchronous signal routing  
Quadrature encoder with rotary filter  
Three 16-bit timer/counters  
One timer/counter with four output compare or input capture channels  
Two timer/counter with two output compare or input capture channels  
High resolution extension enabling down to 4ns PWM resolution  
Waveform extension for control of motor, LED, lighting, H-bridge, high drives, and more  
Fault extension for safe and deterministic handling and/or shut-down of external driver  
CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) generator  
XMEGA Custom Logic (XCL) module with timer, counter and logic functions  
Two 8-bit timer/counters with capture/compare and 16-bit cascade mode  
Connected to one USART to support custom data frame length  
Connected to I/O pins and event system to do programmable logic functions  
MUX, AND, NAND, OR, NOR, XOR, XNOR, NOT, D-Flip-Flop, D Latch, RS Latch  
2018 Microchip Technology Inc.  
Data Sheet Complete  
DS40002059A-page 1  

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