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ATXMEGA128B3 PDF预览

ATXMEGA128B3

更新时间： 2024-11-17 12:22:27
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器
页数 文件大小 规格书
137页 5503K
描述
8/16-bit Atmel XMEGA B3 Microcontroller

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ATXMEGA128B3 数据手册

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Features  
• High-performance, low-power Atmel® AVR® XMEGA® 8/16-bit Microcontroller  
• Nonvolatile program and data memories  
– 64K - 128KBytes of in-system self-programmable flash  
– 4K - 8KBytes boot section  
– 2KBytes EEPROM  
– 4K - 8KBytes internal SRAM  
• Peripheral Features  
– Two-channel DMA controller  
– Four-channel event system  
– Two 16-bit timer/counters  
8/16-bit Atmel  
XMEGA B3  
Microcontroller  
One timer/counter with 4 output compare or input capture channels  
One timer/counter with 2 output compare or input capture channels  
High resolution extensions one timer/counter  
Advanced waveform extension (AWeX) on timer/counter  
Split mode on timer/counter  
– One USB device interface  
USB 2.0 full speed (12Mbps) and low speed (1.5Mbps) device compliant  
32 Endpoints with full configuration flexibility  
– One USART with IrDA support  
ATxmega128B3  
ATxmega64B3  
– AES and DES crypto engine  
– CRC-16 (CRC-CCITT) and CRC-32 (IEEE 802.3) generator  
– One two-wire interface with dual address match (I2C and SMBus compatible)  
– One serial peripheral interface (SPI)  
– 16-bit Real Time Counter (RTC) with separate oscillator  
– Liquid Crystal Display  
4x25 segment driver  
Built in contrast control  
ASCII character mappingGra  
Flexible SWAP of segment and common terminals buses  
– One eight-channel, 12-bit, 300 thousand SPS Analog to Digital Converter  
– Two Analog Comparators with window compare function, and current source feature  
– External interrupts on all General Purpose I/O pins  
– Programmable watchdog timer with separate on-chip ultra low power oscillator  
– QTouch® library support  
Capacitive touch buttons, sliders and wheels  
• Special microcontroller features  
– Power-on reset and programmable brown-out detection  
– Internal and external clock options with PLL  
– Programmable multilevel interrupt controller  
– Five sleep modes  
– Programming and debug interfaces  
JTAG (IEEE 1149.1 Compliant) interface, including boundary scan  
PDI (Program and Debug Interface)  
• I/O and Packages  
– 36 Programmable I/O pins  
– 64 - lead TQFP  
– 64 - pad QFN  
• Operating Voltage  
– 1.6 – 3.6V  
• Operating frequency  
– 0 – 12MHz from 1.6V  
– 0 – 32MHz from 2.7V  
8074B–AVR–02/12  
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