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ATTINY204 PDF预览

ATTINY204

更新时间: 2024-11-25 02:44:51
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美国微芯 - MICROCHIP /
页数 文件大小 规格书
522页 3957K
描述
tinyAVR® 0-series

ATTINY204 数据手册

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ATtiny202/204/402/404/406  
®
tinyAVR 0-series  
Introduction  
®
®
The ATtiny202/204/402/404/406 are members of the tinyAVR 0-series of microcontrollers, using the AVR  
processor with hardware multiplier, running at up to 20 MHz, with 2/4 KB Flash, 128/256 bytes of SRAM, and 64/128  
®
bytes of EEPROM in a 8-, 14-, or 20-pin package. The tinyAVR 0-series uses the latest technologies with a flexible,  
low-power architecture, including Event System, accurate analog features, and Core Independent Peripherals (CIPs).  
Attention:ꢀ This data sheet is valid for industrial qualified devices.  
Features  
CPU  
®
– AVR CPU  
– Running at up to 20 MHz  
– Single-cycle I/O access  
– Two-level interrupt controller  
– Two-cycle hardware multiplier  
Memories  
– 2/4 KB In-system self-programmable Flash memory  
– 64/128 bytes EEPROM  
– 128/256 bytes SRAM  
– Write/erase endurance:  
Flash 10,000 cycles  
EEPROM 100,000 cycles  
– Data retention:  
40 years at 55°C  
System  
– Power-on Reset (POR)  
– Brown-out Detector (BOD)  
– Clock options:  
16/20 MHz low-power internal RC oscillator  
32.768 kHz Ultra Low-Power (ULP) internal RC oscillator  
External clock input  
– Single-Pin Unified Program and Debug Interface (UPDI)  
– Three sleep modes:  
Idle with all peripherals running for immediate wake-up  
Standby  
– Configurable operation of selected peripherals  
DS40002318A-page 1  
Complete Datasheet  
© 2021 Microchip Technology Inc.  

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