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ATSAM3N1C PDF预览

ATSAM3N1C

更新时间: 2023-12-06 19:52:38
品牌 Logo 应用领域
美国微芯 - MICROCHIP /
页数 文件大小 规格书
766页 3048K
描述
The Microchip's SAM3N1C is a member of the SAM3N series of microcontrollers based on the high-per

ATSAM3N1C 数据手册

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1.  
Features  
Core  
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ARM Cortex-M3 revision 2.0 running at up to 48 MHz  
Thumb®-2 Instruction Set  
24-bit SysTick Counter  
Nested Vector Interrupt Controller  
Pin-to-pin compatible with SAM7S legacy products (48/64-pin versions) and SAM3S (48/64/100-pin versions)  
Memories  
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From 16 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator, single plane  
From 4 to 24 Kbytes embedded SRAM  
16 Kbytes ROM with embedded bootloader routines (UART) and IAP routines  
System  
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Embedded voltage regulator for single supply operation  
Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe operation  
Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure Detection and optional low power  
32.768 kHz for RTC or device clock  
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High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default frequency for device startup.  
In-application trimming access for frequency adjustment  
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Slow Clock Internal RC oscillator as permanent low-power mode device clock  
One PLL up to 130 MHz for device clock  
Up to 10 Peripheral DMA (PDC) channels  
Low Power Modes  
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Sleep, Wait, and Backup modes, down to 1.2 µA in Backup mode with RTC, RTT, and 256-bit GPBR  
Peripherals  
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Up to 2 USARTs with RS-485 and SPI mode support. One USART (USART0) has ISO7816, IrDA® and PDC  
support in addition  
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Two 2-wire UARTs  
Two 2-wire Interfaces (I2C compatible)  
One SPI  
Up to two 3-channel 16-bit Timer Counters with capture, waveform, compare and PWM mode, Quadrature  
Decoder Logic and 2-bit Gray Up/Down Counter for Stepper Motor  
4-channel 16-bit PWM  
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32-bit low-power Real-time Timer (RTT)  
Low-power Real-time Clock (RTC) with calendar and alarm features  
Up to 16 channels, 384 ksps 10-bit ADC  
One 500 ksps 10-bit DAC  
Register Write Protection  
I/O  
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Up to 79 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and on-  
die Series Resistor Termination  
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Three 32-bit Parallel Input/Output Controllers  
Packages  
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100-lead LQFP – 14 x 14 mm, pitch 0.5 mm  
100-ball TFBGA – 9 x 9 mm, pitch 0.8 mm  
64-lead LQFP – 10 x 10 mm, pitch 0.5 mm  
64-pad QFN – 9 x 9 mm, pitch 0.5 mm  
48-lead LQFP – 7 x 7 mm, pitch 0.5 mm  
48-pad QFN – 7 x 7 mm, pitch 0.5 mm  
2
SAM3N Series [DATASHEET]  
Atmel-11011C-ATARM-SAM3N-Series-Datasheet_16-Apr-15  

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