ATR2730 [Preliminary]
Table 3-1.
Scaling Factors of the Reference Frequency
Reference Oscillator
Frequency
Voltage at Pin SI1
Voltage at Pin SI2
OPEN
VCC
SF
ref
36
GND
GND
GND
OPEN
OPEN
OPEN
VCC
18.432 MHz
33
48
65
63
64
35
32
49
–
GND
24.576 MHz
OPEN
VCC
–
–
GND
32.768 MHz
17.920 MHZ
16.384 MHz
–
OPEN
VCC
VCC
VCC
GND
3.8
Reference Oscillator
An on-chip crystal oscillator generates the reference signal which is fed to the reference divider.
By connecting a quartz crystal to pins OSCE and OSCB according to Figure 11-2 on page 16,
this oscillator generates a highly stable reference signal. The ATR2731 (Atmel’s one-chip
front-end IC) offers the reference signal at pin FREF. This reference signal (LC filtered to sup-
press harmonics) can be used to overdrive the oscillator. In this application (see Figure 11-3 on
page 16) the reference signal has to be applied to the pin OSCB and the pin OSCE must be left
open.
3.9
Reference Divider
Nine different scaling factors of the reference divider can be selected by different voltage set-
tings at the input pins SI1 and SI2: 32, 33(1), 35, 36, 48, 49(1), 63(1), 64, 65(1). The reference
divider factors result in reference oscillator frequencies shown in Table 3-1.
Note:
1. These scaling factors result in an output frequency of the reference divider of 512 kHz. If har-
monics of the Bd. 3 VCO fall in the L-band reception band, these spurious signals can
influence the AGC of ATR2730, which could be a problem for small incoming signals. In this
case it is possible to switch the reference divider from nref to nref + 1.
3.10 LO Divider
The LO divider is operated at the fixed division ratio 2464. Assuming the settings described in
the section “Reference Divider” , the oscillator's frequency is controlled to be 1261.568 MHz in
the locked state, and the output frequency of the RF divider is 512 kHz.
3.11 Phase Comparator, Charge Pump and Loop Filter
The tri-state phase detector causes the charge pump to source or sink current at the output pin
PD depending on the phase relation of its input signals, which are provided by the reference and
the RF divider respectively. Using the control pin CI, two different values of this current can be
selected, and the charge-pump current can be switched off.
The input of the high-gain amplifier (output pin CD), which is implemented in order to construct a
loop filter as shown in the application circuit, can be switched to GND by means of the control
pin CI (see Table 3-2 on page 8). In the application circuit, the loop filter is completed by con-
necting the pins PD and CD by an appropriate RC network.
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4903C–DAB–03/07