Table 3-1.
ATR0621P1 Pinout (Continued)
Pull Resistor
Pin Name LFBGA100
Pin Type
OUT
OUT
OUT
OUT
I/O
(Reset Value)(1) Firmware Label
PIO Bank A
PIO Bank B
EM_A16
EM_A17
EM_A18
EM_A19
EM_DA0
EM_DA1
EM_DA2
EM_DA3
EM_DA4
EM_DA5
EM_DA6
EM_DA7
EM_DA8
EM_DA9
EM_DA10
EM_DA11
EM_DA12
EM_DA13
EM_DA14
EM_DA15
GND
C6
F8
B3
C5
B6
B10
C7
C10
D10
E7
E9
B7
B8
A9
C8
B9
D8
C9
D9
E8
A1
A10
K1
K10
K8
H7
K7
H6
C4
G7
J6
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
PD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
GND
IN
GND
IN
GND
IN
LDOBAT_IN
LDO_EN
LDO_IN
LDO_OUT
NRESET
NSHDN
NSLEEP
NTRST
IN
IN
IN
OUT
I/O
Open Drain PU
PD
OUT
OUT
IN
K2
K9
G3
P0
I/O
PD
NANTSHORT
GPSMODE0
P1
I/O
Configurable (PD)
AGCOUT1
Notes: 1. PD = internal pull-down resistor, PU = internal pull-up resistor, OH = switched to Output High at reset
2. VBAT18 represent the internal power supply of the backup power domain
3. VDDIO is the supply voltage for the following GPIO pins: P1, P2, P8, P12, P14, P16, P17, P18, P19, P20, P21, P23, P24,
P25, P26, P27 and P29
4. VDD_USB is the supply voltage for the following USB pins: USB_DM and USB_DP. For operation of the USB interface, sup-
ply of 3.0V to 3.6V is required.
5. This pin is not connected
6
ATR0621P1
4975BS–GPS–05/08