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ATF16V8BQL-15JU PDF预览

ATF16V8BQL-15JU

更新时间: 2024-01-02 02:08:14
品牌 Logo 应用领域
爱特美尔 - ATMEL 可编程逻辑器件输入元件异步传输模式PCATM时钟
页数 文件大小 规格书
26页 641K
描述
Industry-standard Architecture Emulates Mary 20-pin PAL

ATF16V8BQL-15JU 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.31.00.01风险等级:7.62
Is Samacsys:N架构:PAL-TYPE
最大时钟频率:45 MHzJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:6.5 mm
湿度敏感等级:2专用输入次数:8
I/O 线路数量:8输入次数:18
输出次数:8产品条款数:64
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C组织:8 DEDICATED INPUTS, 8 I/O
输出函数:MACROCELL封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP20,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
可编程逻辑类型:FLASH PLD传播延迟:15 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Programmable Logic Devices最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

ATF16V8BQL-15JU 数据手册

 浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第7页浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第8页浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第9页浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第11页浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第12页浏览型号ATF16V8BQL-15JU的Datasheet PDF文件第13页 
11.1 ATF16V8B Registered Mode  
PAL Device Emulation/PAL Replacement. The registered mode is used if one or more regis-  
ters are required. Each macrocell can be configured as either a registered or combinatorial  
output or I/O, or as an input. For a registered output or I/O, the output is enabled by the OE pin,  
and the register is clocked by the CLK pin. Eight product terms are allocated to the sum term.  
For a combinatorial output or I/O, the output enable is controlled by a product term, and seven  
product terms are allocated to the sum term. When the macrocell is configured as an input, the  
output enable is permanently disabled.  
Any register usage will make the compiler select this mode. The following registered devices  
can be emulated using this mode:  
16R8  
16R6  
16R4  
16RP8  
16RP6  
16RP4  
Figure 11-1. Registered Configuration for Registered Mode(1)(2)  
Notes: 1. Pin 1 controls common CLK for the registered outputs. Pin 11 controls common OE for the reg-  
istered outputs. Pin 1 and Pin 11 are permanently configured as CLK and OE.  
2. The development software configures all the architecture control bits and checks for proper pin  
usage automatically.  
Figure 11-2. Combinatorial Configuration for Registered Mode(1)(2)  
Notes: 1. Pin 1 and Pin 11 are permanently configured as CLK and OE.  
2. The development software configures all the architecture control bits and checks for proper pin  
usage automatically.  
10  
ATF16V8B/BQ/BQL  
0364J–PLD–7/05  

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