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ATF16V8B/BQ/BQL PDF预览

ATF16V8B/BQ/BQL

更新时间: 2022-01-18 22:57:00
品牌 Logo 应用领域
其他 - ETC 可编程逻辑器件
页数 文件大小 规格书
19页 549K
描述
ATF16V8B/BQ/BQL [Updated 4/01. 19 Pages] 250 gate electrically erasable PLD. 20 pins

ATF16V8B/BQ/BQL 数据手册

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ATF16V8B(QL)  
Input Test Waveforms and  
Measurement Levels:  
Output Test Loads:  
Commercial  
tR, tF < 5 ns (10% to 90%)  
Pin Capacitance  
f = 1 MHz, T = 25°C(1)  
Typ  
Max  
8
Units  
pF  
Conditions  
VIN = 0 V  
CIN  
5
COUT  
Note:  
6
8
pF  
VOUT = 0 V  
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.  
Power-up Reset  
The registers in the ATF16V8Bs are designed to reset dur-  
ing power-up. At a point delayed slightly from VCC crossing  
VRST, all registers will be reset to the low state. As a result,  
the registered output state will always be high on power-up.  
This feature is critical for state machine initialization. How-  
ever, due to the asynchronous nature of reset and the  
uncertainty of how VCC actually rises in the system, the fol-  
lowing conditions are required:  
1. The VCC rise must be monotonic,  
2. After reset occurs, all input and feedback setup  
times must be met before driving the clock pin high,  
and  
Parameter  
Description  
Typ  
Max  
Units  
3. The clock must remain stable during tPR  
.
Power-up  
Reset Time  
tPR  
600  
1,000  
ns  
Preload of Registered Outputs  
Power-up  
Reset Voltage  
VRST  
3.8  
4.5  
V
The ATF16V8Bs registers are provided with circuitry to  
allow loading of each register with either a high or a low.  
This feature will simplify testing since any state can be  
forced into the registers to control test sequencing. A  
JEDEC file with preload is generated when a source file  
with vectors is compiled. Once downloaded, the JEDEC file  
preload sequence will be done automatically by most of the  
approved programmers after the programming.  
Security Fuse Usage  
A single fuse is provided to prevent unauthorized copying  
of the ATF16V8B fuse patterns. Once programmed, fuse  
verify and preload are inhibited. However, the 64-bit User  
Signature remains accessible.  
The security fuse should be programmed last, as its effect  
is immediate.  
5

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