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ATA8210-WNQW PDF预览

ATA8210-WNQW

更新时间: 2024-01-15 17:25:19
品牌 Logo 应用领域
爱特美尔 - ATMEL 电信电信集成电路
页数 文件大小 规格书
20页 776K
描述
Telecom Circuit, 1-Func, 5 X 5 MM, 0.50 MM PITCH, LEAD FREE, VQFN-32

ATA8210-WNQW 技术参数

生命周期:Active包装说明:HVQCCN,
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.7JESD-30 代码:S-XQCC-N32
长度:5 mm功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE座面最大高度:0.9 mm
标称供电电压:3.6 V表面贴装:YES
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD宽度:5 mm
Base Number Matches:1

ATA8210-WNQW 数据手册

 浏览型号ATA8210-WNQW的Datasheet PDF文件第11页浏览型号ATA8210-WNQW的Datasheet PDF文件第12页浏览型号ATA8210-WNQW的Datasheet PDF文件第13页浏览型号ATA8210-WNQW的Datasheet PDF文件第15页浏览型号ATA8210-WNQW的Datasheet PDF文件第16页浏览型号ATA8210-WNQW的Datasheet PDF文件第17页 
Two independent receive paths A and B are integrated in the Rx DSP after the channel filter and allow the use of different  
data rates, modulation types, and protocols without the need to power up the receive path more than once to decide which  
signal should be received. This results in a reduced polling current in several applications.  
The integration of remote keyless entry (RKE), passive entry and go (PEG) and tire-pressure monitoring systems (TPM) into  
one module is simplified because completely different protocols can be supported and a low polling current is achieved. It is  
even possible to configure different receive RF bands for different applications by using the two LNA inputs. For example, a  
TPM receiver can be realized at 433.92MHz while a PEG system uses the 868MHz ISM band with multi-channel  
communication.  
3.2.2 Rx Digital Signal Processing (Rx DSP)  
The Rx digital signal processing (DSP) block performs the digital filtering, decoding, checking, and byte-wise buffering of the  
Rx samples that are derived from the ADC as shown in Figure 3-2. The Rx DSP provides the following outputs:  
Raw demodulated data at the TRPA/B pins  
Decoded data at the TMDO and TMDO_CLK pins  
Buffered data bytes toward the data FIFO and ID check block  
Auxiliary information about the signal such as the received signal strength indication (RSSI) and the frequency offset  
of the received signal from the selected center frequency (RXFOA/B)  
Figure 3-2. Rx DSP Overview  
RXFOA TRPA  
TMDO_A  
TMDO_CLK_A  
Data  
Byte  
Path  
A
=
Demod  
&
Check  
ADC  
Data  
Data  
FIFO  
Data  
Byte  
Path  
B
=
TMDO_B  
TMDO_CLK_B  
RSSI RXFOB TRPB  
Support  
FIFO  
=
The channel filter determines the receiver bandwidth. Its output is used for both receiving paths A and B, making it  
necessary to configure the filter to match both paths. The receiving paths A and B are identical and consist of an ASK/FSK  
demodulator with attached signal checks, a frame synchronizer which supports pattern-based searches for the telegram  
start and a 1-byte hardware buffer with integrated CRC checker for the received data.  
Depending on the signal checks, one path is selected which writes the received data to the data FIFO and optionally to the  
ID check block.  
The RSSI values are determined by the demodulator and written via the RSSI buffer to the support FIFO where the latest  
16 values are stored for further processing.  
14  
ATA8210/ATA8215 [SUMMARY DATASHEET]  
9344CS–INDCO–09/14  

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