ATA6565
least tFilter, must be received via the bus. Dominant or
recessive bus levels shorter than tFilter are always
ignored. The complete dominant-recessive-dominant
pattern, as shown in Figure 1-3, must be received within
the bus wake-up time-out time, tWake, to be recognized
as a valid wake-up pattern. This filtering leads to a higher
robustness against EMI and transients, and therefore,
significantly reduces the risk of an unwanted bus
wake-up.
1.2.3
UNDERVOLTAGE DETECTION ON
VCC PIN
If VVCC drops below its undervoltage detection level,
Vuvd(VCC) (see Section 2.0 “Electrical Characteris-
tics”), the transceiver switches off and disengages
from the bus until VVCC has recovered. The low-power
wake-up comparator is only switched off during a VCC
undervoltage. The logic state of the STBY pin is
ignored until the VCC voltage has recovered.
1.2.5
OVERTEMPERATURE
PROTECTION
1.2.4
BUS WAKE-UP ONLY AT
DEDICATED WAKE-UP PATTERN
The output drivers are protected against overtemperature
conditions. If the junction temperature exceeds the shut-
down junction temperature, TJsd, the output drivers are
disabled until the junction temperature drops below TJsd
and the TXD pin is at a high level again. This TXD condi-
tion ensures that output driver oscillations, due to tem-
perature drift, are avoided.
Due to the implementation of the wake-up filtering, the
transceiver does not wake up when the bus is in a long
dominant phase; it only wakes up at a dedicated wake-up
pattern, as specified in the ISO 11898-2:2016. This
means for a valid wake-up, at least two consecutive
dominant bus levels for a duration of at least tFilter, each
separated by a recessive bus level with a duration of at
FIGURE 1-4:
RELEASE OF TRANSMISSION AFTER OVERTEMPERATURE CONDITION
Failure
Overtemp
OT
Overtemperature
t
TXD
VVCC
GND
t
BUS VDIFF
(CANH-CANL)
D
R
D
R
D
R
t
t
RXD
VVCC
GND
DS20005782E-page 6
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