Datasheet > ATA6565

ATA6565

更新时间： 2023-12-06 20:09:35

品牌	Logo	应用领域
美国微芯 - MICROCHIP		/
页数	文件大小	规格书
32页	1242K
描述
The Microchip ATA6565 is a fully integrated dual high-speed CAN transceiver with two completely in

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ATA6565 数据手册

ATA6565

1.2.6

SHORT-CIRCUIT PROTECTION OF

BUS PINS

1.2.7

RXD RECESSIVE CLAMPING

This fail-safe feature prevents the controller from sending

data on the bus if its RXD is clamped to high (for exam-

ple, recessive). That is, if the RXD pin cannot signal a

dominant bus condition (for example, because it is

shorted to VCC), the transmitter is disabled to avoid pos-

sible data collisions on the bus. In Normal mode, the

device permanently compares the state of the HSC with

the state of the RXD pin. If the HSC indicates a dominant

bus state for more than t_{RC_det}, without the RXD pin

doing the same, a recessive clamping situation is

detected and the transceiver is forced into Silent mode.

This Fail-Safe mode is released by either entering

Standby or Unpowered mode, or if the RXD pin is

showing a dominant (for example, low) level again.

The CANH and CANL bus outputs are short-circuit

protected, either against GND or a positive supply

voltage.

current-limiting circuit protects the

transceiver against damage. If the device is heating up

due to a continuous short on CANH or CANL, the

internal overtemperature protection switches the bus

transmitter off.

FIGURE 1-5:

RXD RECESSIVE CLAMPING DETECTION

CAN

TXD

RXD

Operation

Mode

Normal

Silent

Normal

If the clamping condition is removed and a

dominant bus is detected, the transceiver

goes back to normal mode.

goes back to Normal mode.

 2017-2020 Microchip Technology Inc.

DS20005782E-page 7

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