2. Block Diagram
Figure 2-1. AT91SAM7SE512/256/32 Block Diagram Signal Description
TDI
TDO
TMS
TCK
ICE
ARM7TDMI
Processor
JTAG
SCAN
JTAGSEL
1.8V
Voltage
Regulator
VDDIN
GND
VDDOUT
System Controller
AIC
TST
FIQ
VDDCORE
VDDIO
Memory Controller
IRQ0-IRQ1
Embedded
SRAM
32 Kbytes (SE512/256)
or
Address
Decoder
Flash
Controller
PDC
DRXD
DTXD
8 Kbytes (SE32)
DBGU
Abort
Status
Misalignment
Detection
PDC
PCK0-PCK2
PLLRC
VDDFLASH
ERASE
Flash
Memory Protection
512 Kbytes (SE512)
256 Kbytes (SE256)
32 Kbytes (SE32)
PLL
Unit
XIN
XOUT
OSC
PMC
RCOSC
Peripheral Bridge
VDDFLASH
VDDCORE
BOD
POR
ROM
Reset
Controller
Peripheral DMA
Controller
11 Channels
VDDCORE
NRST
PGMRDY
PGMNVALID
PGMNOE
Fast Flash
Programming
Interface
PGMCK
PGMM0-PGMM3
PGMD0-PGMD15
PGMNCMD
PIT
APB
PGMEN0-PGMEN1
WDT
RTT
SAM-BA
PIOA
PIOC
D[31:0]
A0/NBS0
A1/NBS2
EBI
PIOB
A[15:2], A[20:18]
A21/NANDALE
A22/REG/NANDCLE
A16/BA0
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DCD1
DSR1
DTR1
RI1
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
PDC
A17/BA1
NCS0
USART0
USART1
CompactFlash
NAND Flash
NCS1/SDCS
NCS2/CFCS1
NCS3/NANDCS
NRD/CFOE
NWR0/NWE/CFWE
NWR1/NBS1/CFIOR
NBS3/CFIOW
SDCKE
PDC
PDC
SDRAM
Controller
RAS
CAS
PDC
PDC
SDWE
SDA10
CFRNW
NCS4/CFCS0
NCS5/CFCE1
NCS6/CFCE2
NCS7
SPI
Static Memory
Controller
PDC
NANDOE
NANDWE
TCLK0
TCLK1
TCLK2
NWAIT
Timer Counter
TC0
ECC
Controller
SDCK
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
FIFO
TC1
TC2
DDM
DDP
USB Device
ADTRG
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
PDC
PWM0
PWM1
PWM2
PWM3
TF
PWMC
PDC
PDC
ADC
TK
TD
SSC
TWI
RD
RK
RF
ADVREF
TWD
TWCK
4
AT91SAM7SE512/256/32 Preliminary
6222ES–ATARM–15-Dec-09