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AT91SAM7X256-AU-001 PDF预览

AT91SAM7X256-AU-001

更新时间： 2024-01-29 01:52:58
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器
页数 文件大小 规格书
637页 7805K
描述
AT91 ARM Thumb-based Microcontrollers

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AT91SAM7X256-AU-001 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：QFP包装说明：LFQFP,
针数：100Reach Compliance Code：compliant
ECCN代码：3A001.A.3HTS代码：8542.31.00.01
风险等级：5.62具有ADC：YES
其他特性：ALSO REQUIRES 3.3V SUPPLY地址总线宽度：
位大小：32最大时钟频率：50 MHz
DAC 通道：NODMA 通道：YES
外部数据总线宽度：JESD-30 代码：S-PQFP-G100
JESD-609代码：e3长度：14 mm
湿度敏感等级：3I/O 线路数量：62
端子数量：100最高工作温度：85 °C
最低工作温度：-40 °CPWM 通道：YES
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260认证状态：Not Qualified
ROM可编程性：FLASH座面最大高度：1.6 mm
速度：55 MHz最大供电电压：1.95 V
最小供电电压：1.65 V标称供电电压：1.8 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：14 mmuPs/uCs/外围集成电路类型：MICROCONTROLLER, RISC

AT91SAM7X256-AU-001 数据手册

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Features  
• Incorporates the ARM7TDMI® ARM® Thumb® Processor  
– High-performance 32-bit RISC Architecture  
– High-density 16-bit Instruction Set  
– Leader in MIPS/Watt  
– EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support  
• Internal High-speed Flash  
– 256 Kbytes (AT91SAM7X256) Organized in 1024 Pages of 256 Bytes  
– 128 Kbytes (AT91SAM7X128) Organized in 512 Pages of 256 Bytes  
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions  
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed  
– Page Programming Time: 6 ms, Including Page Auto-erase,  
Full Erase Time: 15 ms  
AT91 ARM®  
Thumb®-based  
Microcontrollers  
– 10,000 Write Cycles, 10-year Data Retention Capability,  
Sector Lock Capabilities, Flash Security Bit  
– Fast Flash Programming Interface for High Volume Production  
• Internal High-speed SRAM, Single-cycle Access at Maximum Speed  
– 64 Kbytes (AT91SAM7X256)  
AT91SAM7X256/  
AT91SAM7X128  
– 32 Kbytes (AT91SAM7X128)  
• Memory Controller (MC)  
– Embedded Flash Controller, Abort Status and Misalignment Detection  
• Reset Controller (RSTC)  
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout  
Detector  
Preliminary  
– Provides External Reset Signal Shaping and Reset Source Status  
• Clock Generator (CKGR)  
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL  
• Power Management Controller (PMC)  
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and  
Idle Mode  
– Four Programmable External Clock Signals  
• Advanced Interrupt Controller (AIC)  
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources  
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt  
Protected  
• Debug Unit (DBGU)  
– 2-wire UART and Support for Debug Communication Channel interrupt,  
Programmable ICE Access Prevention  
• Periodic Interval Timer (PIT)  
– 20-bit Programmable Counter plus 12-bit Interval Counter  
• Windowed Watchdog (WDT)  
– 12-bit key-protected Programmable Counter  
– Provides Reset or Interrupt Signals to the System  
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode  
• Real-time Timer (RTT)  
– 32-bit Free-running Counter with Alarm  
– Runs Off the Internal RC Oscillator  
• Two Parallel Input/Output Controllers (PIO)  
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os  
– Input Change Interrupt Capability on Each I/O Line  
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output  
6120D–ATARM–02-Feb-06  
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