Features
• Compatible with MCS-51™ Products
• 12K Bytes of In-System Reprogrammable Downloadable Flash Memory
– SPI Serial Interface for Program Downloading
– Endurance: 1,000 Write/Erase Cycles
• 4.0V to 6V Operating Range
• Fully Static Operation: 0 Hz to 24 MHz
• Three-Level Program Memory Lock
• 256 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Three 16-bit Timer/Counters
• Nine Interrupt Sources
8-Bit
• Programmable UART Serial Channel
• SPI Serial Interface
• Low Power Idle and Power Down Modes
• Interrupt Recovery From Power Down
• Programmable Watchdog Timer
• Dual Data Pointer
Microcontroller
with 12K Bytes
Flash
• Power Off Flag
Description
AT89S53
The AT89S53 is a low-power, high-performance CMOS 8-bit microcomputer with 12K
bytes of Downloadable Flash programmable and erasable read only memory. The
device is manufactured using Atmel’s high density nonvolatile memory technology
and is compatible with the industry standard 80C51 instruction set and pinout. The on-
chip Downloadable Flash allows the program memory to be reprogrammed in-system
through an SPI serial interface or by a conventional nonvolatile memory programmer.
By combining a versatile 8-bit CPU with Downloadable Flash on a monolithic chip, the
Atmel AT89S53 is a powerful microcomputer which provides a highly flexible and cost
effective solution to many embedded control applications.
The AT89S53 provides the following standard features: 12K bytes of Downloadable
Flash, 256 bytes of RAM, 32 I/O lines, programmable watchdog timer, two Data Point-
ers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full
duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S53 is
designed with static logic for operation down to zero frequency and supports two soft-
ware selectable power saving modes. The Idle Mode stops the CPU while allowing
the RAM, timer/counters, serial port, and interrupt system to continue functioning. The
Power Down Mode saves the RAM contents but freezes the oscillator, disabling all
other chip functions until the next interrupt or hardware reset.
The Downloadable Flash can be changed a single byte at a time and is accessible
through the SPI serial interface. Holding RESET active forces the SPI bus into a serial
programming interface and allows the program memory to be written to or read from
unless Lock Bit 2 has been activated.
0787B-B–12/97
4-217