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AT80C5112_08 PDF预览

AT80C5112_08

更新时间： 2024-11-24 03:19:35
品牌 Logo 应用领域
爱特美尔 - ATMEL 转换器微控制器
页数 文件大小 规格书
97页 980K
描述
8-bit Microcontroller with A/D Converter

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中文翻译

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AT80C5112_08 数据手册

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Features  
•
80C51 Compatible  
– Five I/O Ports  
– Two 16-bit Timer/Counters  
– 256 Bytes RAM  
•
•
8K Bytes ROM/OTP Program Memory with 64 Bytes Encryption Array and 3 Security  
Levels  
High-Speed Architecture  
– 33 MHz at 5V (66 MHz Equivalent)  
– X2 Speed Improvement Capability (6 Clocks/Machine Cycle)  
10-bit, 8 Channels A/D Converter  
Hardware Watchdog Timer with Reset-out  
Programmable I/O Mode: Standard C51, Input Only, Push-pull, Open Drain  
Asynchronous Port Reset  
•
•
•
•
•
•
•
8-bit  
Microcontroller  
with A/D  
Full Duplex Enhanced UART with Baud Rate Generator  
SPI, Master Mode  
Dual System Clock  
Converter  
– Crystal or Ceramic Oscillator (33/40 MHz)  
– Internal RC Oscillator (12 MHz)  
– Programmable Prescaler  
•
•
Programmable Counter Array with High-speed Output, Compare/Capture, Pulse Width  
Modulation and Watchdog Timer Capabilities  
Interrupt Structure  
AT80C5112  
AT83C5112  
AT87C5112  
– 8 Interrupt Sources  
– 4 Interrupt Priority Levels  
•
Power Control Modes  
– Idle Mode  
– Power-down Mode  
– Power-off Flag  
•
•
•
Power Supply: 2.7 - 5.5V  
Temperature Range: Industrial (-40 To 85°C)  
Package: LQFP48 (Body 7*7*1.4 mm), PLCC52  
Description  
The AT8xC5112 is a high performance ROM/OTP version of the 80C51 8-bit  
microcontroller.  
The AT8xC5112 retains all the features of the standard 80C51 with 8 Kbytes  
ROM/OTP program memory, 256 bytes of internal RAM, a 8-source, 4-level interrupt  
system, an on-chip oscillator and two timer/counters.  
The AT8xC5112 is dedicated for analog interfacing applications. For this, it has a 10-  
bit, 8 channels A/D converter and a five channels Programmable Counter Array.  
In addition, the AT8xC5112 has a Hardware Watchdog Timer, a versatile serial chan-  
nel that facilitates multiprocessor communication (EUART) with an independent baud  
rate generator, a SPI serial bus controller and a X2 speed improvement mechanism.  
The X2 feature allows to keep the same CPU power at a divided by two oscillator  
frequency.  
The fully static design of the AT8xC5112 allows to reduce system power consumption  
by bringing the clock frequency down to any value, even DC, without loss of data.  
Rev. 4191C–8051–02/08  
1234567...97

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