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AT27C4096-85VC PDF预览

AT27C4096-85VC

更新时间: 2024-10-30 23:32:15
品牌 Logo 应用领域
其他 - ETC 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
12页 171K
描述
x16 EPROM

AT27C4096-85VC 数据手册

 浏览型号AT27C4096-85VC的Datasheet PDF文件第2页浏览型号AT27C4096-85VC的Datasheet PDF文件第3页浏览型号AT27C4096-85VC的Datasheet PDF文件第4页浏览型号AT27C4096-85VC的Datasheet PDF文件第5页浏览型号AT27C4096-85VC的Datasheet PDF文件第6页浏览型号AT27C4096-85VC的Datasheet PDF文件第7页 
Features  
Fast Read Access Time - 45 ns  
Low-Power CMOS Operation  
– 100 µA max. Standby  
– 20 mA max. Active at 5 MHz  
JEDEC Standard Packages  
– 28-Lead 600-mil PDIP  
– 32-Lead PLCC  
– 28-Lead TSOP and SOIC  
5V ± 10% Supply  
High-Reliability CMOS Technology  
– 2,000V ESD Protection  
512K (64K x 8)  
OTP EPROM  
– 200 mA Latchup Immunity  
RapidProgramming Algorithm - 100 µs/byte (typical)  
CMOS and TTL Compatible Inputs and Outputs  
Integrated Product Identification Code  
Commercial, Industrial and Automotive Temperature Ranges  
AT27C512R  
Description  
The AT27C512R is a low-power, high-performance 524,288-bit one-time programma-  
ble read only memory (OTP EPROM) organized 64K by 8 bits. It requires only one 5V  
power supply in normal read mode operation. Any byte can be accessed in less than  
45 ns, eliminating the need for speed reducing WAIT states on high-performance  
microprocessor systems.  
Atmel’s scaled CMOS technology provides high-speed, lower active power consump-  
tion, and significantly faster programming. Power consumption is typically only 8 mA  
in Active Mode and less than 10 µA in Standby.  
(continued)  
PDIP, SOIC Top View  
Pin Configurations  
A15  
A12  
A7  
1
2
3
4
5
6
7
8
9
28 VCC  
27 A14  
26 A13  
25 A8  
Pin Name  
A0 to A15  
O0 - O7  
CE  
Function  
Addresses  
A6  
A5  
24 A9  
Outputs  
A4  
23 A11  
22 OE/VPP  
21 A10  
20 CE  
19 O7  
18 O6  
17 O5  
16 O4  
15 O3  
A3  
Chip Enable  
Output Enable/VPP  
No Connect  
A2  
A1  
OE/VPP  
NC  
A0 10  
O0 11  
O1 12  
O2 13  
GND 14  
512K EPROM  
PLCC Top View  
TSOP Top View  
Type 1  
A6  
A5  
A4  
A3  
A2  
5
6
7
8
9
29 A8  
28 A9  
OE/VPP  
A11  
A9  
22  
23  
24  
25  
26  
27  
28  
1
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
A10  
CE  
O7  
O6  
O5  
O4  
O3  
GND  
O2  
O1  
O0  
A0  
27 A11  
26 NC  
25 OE/VPP  
24 A10  
23 CE  
22 O7  
21 O6  
A8  
A1 10  
A0 11  
NC 12  
O0 13  
A13  
A14  
VCC  
A15  
A12  
A7  
2
3
A6  
4
A5  
5
A4  
6
A1  
Rev. 0015I–07/98  
A3  
7
8
A2  
Note:  
PLCC Package Pins 1 and  
17 are DON’T CONNECT.  

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