Features
• Write Protect Pin for Hardware Data Protection
– Utilizes Different Array Protection Compared to the AT24C02/04
• Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 256 x 8 (2K), 512 x 8 (4K)
• Two-wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V) and 400 kHz (2.5V, 2.7V, 5V) Clock Rate
• 8-byte Page (2K), 16-byte Page (4K) Write Modes
• Partial Page Writes Allowed
• Self-timed Write Cycle (5 ms Max)
• High Reliability
Two-wire Serial
EEPROM
2K (256 x 8)
– Endurance: One Million Write Cycles
– Data Retention: 100 Years
• Automotive Grade, Extended Temperature and Lead-Free/Halogen-Free Devices
Available
4K (512 x 8)
• 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP, 8-lead TSSOP and 8-ball dBGA2 Packages
• Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers.
AT24C02A
AT24C04A
Description
The AT24C02A/04A provides 2048/4096 bits of serial electrically erasable and program-
mable read-only memory (EEPROM) organized as 256/512 words of 8 bits each. The
device is optimized for use in many industrial and commercial applications where low-
power and low-voltage operation are essential. The AT24C02A/04A is available in
space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP pack-
ages and is accessed via a two-wire serial interface. In addition, the entire family is
available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configuration
8-lead PDIP
8-lead TSSOP
Pin Name
A0–A2
SDA
Function
A0
A1
1
2
3
4
8
7
6
5
VCC
WP
Address Inputs
Serial Data
A0
A1
1
2
3
4
8
7
6
5
VCC
WP
A2
SCL
SDA
A2
SCL
SDA
GND
GND
SCL
Serial Clock Input
Write Protect
No-connect
8-lead SOIC
8-lead MAP
WP
VCC
WP
8
7
6
5
1
2
3
4
A0
A0
A1
A2
1
2
3
4
8
7
6
5
VCC
NC
A1
WP
SCL
SDA
A2
SCL
SDA
GND
GND
Bottom View
8-ball dBGA2
VCC
WP
8
7
6
5
1
2
3
4
A0
A1
SCL
SDA
A2
GND
Bottom View
Rev. 0976Q–SEEPR–8/05
1