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ASVMPLP-2.300MHZ-Y-T3 PDF预览

ASVMPLP-2.300MHZ-Y-T3

更新时间: 2024-11-24 04:14:15
品牌 Logo 应用领域
ABRACON 石英晶振
页数 文件大小 规格书
7页 3347K
描述
XO, Clock, 2.3MHz Min, 460MHz Max, 2.3MHz Nom, CMOS,

ASVMPLP-2.300MHZ-Y-T3 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:DILCC6,.2Reach Compliance Code:compliant
风险等级:5.67安装特点:SURFACE MOUNT
端子数量:6最大工作频率:460 MHz
最小工作频率:2.3 MHz标称工作频率:2.3 MHz
最高工作温度:70 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装等效代码:DILCC6,.2
电源:2.5/3.3 V认证状态:Not Qualified
子类别:XO, Clock最大压摆率:58 mA
表面贴装:YES技术:CMOS
Base Number Matches:1

ASVMPLP-2.300MHZ-Y-T3 数据手册

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PERFORMANCE PLASTIC PACKAGE ULTRA MINIATURE  
TM  
PURE SILICON CLOCK OSCILLATOR  
RoHS/RoHS II compliant  
Pb  
ASVMP  
7.0 x 5.0 x 0.85mm  
Moisture Sensitivity Level – MSL 1  
APPLICATIONS:  
• Storage Area Networks  
FEATURES:  
Low Jitter  
High Performance  
3G MEMS Technology!  
TM  
• Ultra Miniature Pure Silicon Clock Oscillator  
• High Performance MEMS Technology by Discera  
• Low Power Consumption for high speed communication  
• Exceptional Stability Over Temp. at -40 to +85°C, ±15ppm  
• Extended Automotive Grade Temp. stability at -55 to +125°C, ±25ppm  
• Available in 50kG Shock Resistance Configuration upon request  
• MIL-STD-883 shock and vibration compliant  
(SATA, SAS, Fiber Channel)  
• Passive Optical Networks (EPON,  
10G-EPON, GPON, 10G-PON)  
• Ethernet (1G, 10GBASE-T,/KR/LR/SR, FCoE  
• HD/SD/SDI Video & Surveillance  
• PCI Express  
• Durable QFN Plastic Compact Packaging  
• Display port  
• Standby or Disable Tri-state function  
• Low jitter (Period jitter RMS and Phase jitter RMS)  
• High power supply noise reduction, -50dBc  
STANDARD SPECIFICATIONS:  
Common Key Electrical Specifications – CMOS, LVPECL, LVDS, and HCSL  
Parameters  
Minimum  
Typical  
Maximum  
Units  
Notes  
Commercial, Industrial  
temp. range  
Automotive temp range  
-55 ~ +125°C  
Commercial, Industrial  
temp. range  
Commercial, Industrial  
temp range  
Commercial, Industrial  
temp. range  
CMOS  
CMOS  
LVPECL  
LVDS  
2.3000*  
170.0000  
2.3000*  
2.3000*  
2.3000*  
2.3000*  
100.0000  
460.0000  
460.0000  
460.0000  
Frequency Range  
MHz  
HCSL  
Operating Temperature  
Storage Temperature  
Overall Frequency Stability  
Supply Voltage (Vdd)  
Startup Time  
-20  
-55  
-50  
+70  
+150  
+50  
+3.6  
5
°C  
°C  
See options  
ppm See options  
V
ms  
+2.25  
20  
5
5
22  
ns  
ms  
ns  
STD (Tri-state)  
PD option (Power Down)  
Enable Time  
Disable Time  
Disable Current  
20  
STD (Tri-state)  
PD option (Power Down)  
40kΩ pull-up resister  
embedded  
mA  
0.095  
"1" (VIH≥0.75*Vdd) or Open: Oscillation  
"0" (VIL<0.25*Vdd) : Hi Z  
Tri-state Function (Standby/Disable)  
V
Aging  
-5.0  
+5.0  
ppm First year  
* For 2.3000MHz < F0 < 9.9999MHz, 6-8 weeks lead-time applies  
Key Electrical Specifications – CMOS  
Parameters  
Supply Current (Idd)  
Minimum  
Typical  
Maximum Units  
Notes  
31  
35  
mA CL=15pF, 125MHz  
VOH  
VOL  
Tr  
0.9*Vdd  
V
V
ns  
ns  
%
Output Logic Level  
I=±6mA  
0.1*Vdd  
Rise Time  
Fall Time  
Duty Cycle  
1.1  
1.3  
2.0  
2.0  
55  
2
2
2
CL=15pF  
20% to 80%  
Tf  
45  
200kHz ~ 20MHz@125MHz  
100kHz ~ 20MHz@125MHz  
12kHz ~ 20MHz@125MHz  
0.30  
0.38  
1.70  
3.0  
Integrated Phase Jitter (JPH)  
ps  
ps  
Period Jitter RMS (JPER  
)
Visit www.abracon.comfor Terms & Conditions of Sale Revised: 03.03.14  
30332Esperanza, Rancho Santa Margarita,California 92688  
tel 949-546-8000 | fax 949-546-8001 | www.abracon.com  
ABRACON IS  
ISO9001:2008  
CERTIFIED  
CERTIFIED  

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