ASM3P1819N
Product Preview
Low Power Mobile VGA EMI
Reduction IC
Description
The ASM3P1819N is a versatile spread spectrum frequency
modulator designed specifically for a wide range of input clock
frequencies from 20 to 40 MHz. The ASM3P1819N can generate an
EMI reduced clock from crystal, ceramic resonator, or system clock.
The ASM3P1819N reduces electromagnetic interference (EMI) at
the clock source, allowing a system wide EMI reduction for all the
down stream clocks and data dependent signals. The ASM3P1819N
allows significant system cost savings by reducing the number of
circuit board layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass EMI regulations.
The ASM3P1819N modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, thereby decreasing the
peak amplitude of its harmonics. This results in a significantly lower
system EMI compared to the typical narrow band signal produced by
oscillators and most clock generators.
http://onsemi.com
SOIC−8
S SUFFIX
TSSOP−8
T SUFFIX
CASE 751BD
CASE 948AL
PIN CONFIGURATION
1
XOUT
VDD
PD#
XIN
VSS
Lowering EMI by increasing a signal’s bandwidth is called “spread
spectrum clock generation”. The ASM3P1819N uses the most
efficient and optimized modulation profile approved by the FCC and
is implemented by using a proprietary all digital method.
NC
REF
ModOUT
(Top View)
Applications
The ASM3P1819N is targeted towards EMI management for
memory and LVDS interfaces in mobile graphic chipsets and
high−speed digital applications such as PC peripheral devices,
consumer electronics and embedded controller system.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Features
• FCC Approved Method of EMI Attenuation
• Provides up to 15 dB EMI Reduction
• Generates a Low EMI Spread Spectrum Clock and a Non−spread
Reference Clock of the Input Frequency
• Optimized for Frequency Range from 20 MHz to 40 MHz
• Internal Loop Filter Minimizes External Components and Board Space
• Down Spread Deviation: −1.25%
• Low Inherent Cycle−to−Cycle Jitter
• 3.3 V Operating Voltage
• CMOS/TTL Compatible Inputs and Outputs
• Low Power CMOS Design
• Supports Notebook VGA and Other LCD Timing Controller
Applications
• Power Down Function for Mobile Application
• Products are Available for Industrial Temperature Range
• Available in 8 pin SOIC and TSSOP Packages
• These are Pb−Free Devices
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2011
1
Publication Order Number:
August, 2011 − Rev. P2
ASM3P1819N/D