Datasheet > AS7C34096-10TCH

AS7C34096-10TCH

更新时间： 2022-12-01 20:41:33

品牌	Logo	应用领域
ALSC		静态存储器光电二极管
页数	文件大小	规格书
10页	269K
描述
Standard SRAM, 512KX8, 10ns, CMOS, PDSO44, TSOP2-44

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数据手册

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AS7C34096-10TCH 数据手册

AS7C4096

AS7C34096

ꢀꢀ

Write cycle (over the operating range)

–10

–12

–15

–20

Parameter

Write cycle time

Symbol Min

Max

–

Min

Max

–

Min

Max

–

Min

Max Unit Notes

t_WC

t_CW

t_AW

t_AS

–

Chip enable (CE) to write end

Address setup to write end

Address setup time

–

Write pulse width (OE = high)

Write pulse width (OE = low

Address hold from end of write

Write recovery time

t_WP1

t_WP2

t_AH

–

t_WR

t_DW

t_DH

t_WZ

t_OW

–

Data valid to write end

–

Data hold time

–

4, 5

Write enable to output in high Z

Output active from write end

–

ꢀꢈꢃꢀꢀ

Write waveform 1 (WE controlled)

Address

Data valid

OUT

ꢀꢈꢃꢀꢀ

Write waveform 2 (CE controlled)

Address

Data valid

OUT

11/28/01; v.1.7

Alliance Semiconductor

P. 5 of 10

1 2 3 456 7 8...10

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